ATMEGA328P-AU Atmel, ATMEGA328P-AU Datasheet - Page 17

MCU AVR 32K FLASH 32TQFP

ATMEGA328P-AU

Manufacturer Part Number
ATMEGA328P-AU
Description
MCU AVR 32K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA328P-20AU
ATMEGA328P-20AU
Q3790246

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8. AVR Memories
8.1
8.2
8271D–AVR–05/11
Overview
In-System Reprogrammable Flash Program Memory
This section describes the different memories in the ATmega48A/PA/88A/PA/168A/PA/328/P.
The AVR architecture has two main memory spaces, the Data Memory and the Program Mem-
ory space. In addition, the ATmega48A/PA/88A/PA/168A/PA/328/P features an EEPROM
Memory for data storage. All three memory spaces are linear and regular.
The ATmega48A/PA/88A/PA/168A/PA/328/P contains 4/8/16/32Kbytes On-chip In-System
Reprogrammable Flash memory for program storage. Since all AVR instructions are 16 or 32
bits wide, the Flash is organized as 2/4/8/16K x 16. For software security, the Flash Program
memory space is divided into two sections, Boot Loader Section and Application Program Sec-
tion in ATmega88PA and ATmega168PA. See SELFPRGEN description in section
Store Program Memory Control and Status Register” on page 295
The Flash memory has an endurance of at least 10,000 write/erase cycles. The
ATmega48A/PA/88A/PA/168A/PA/328/P Program Counter (PC) is 11/12/13/14 bits wide, thus
addressing the 2/4/8/16K program memory locations. The operation of Boot Program section
and associated Boot Lock bits for software protection are described in detail in
ming the Flash, ATmega 48A/48PA” on page 271
Self-Programming” on page
description on Flash Programming in SPI- or Parallel Programming mode.
Constant tables can be allocated within the entire program memory address space (see the LPM
– Load Program Memory instruction description).
Timing diagrams for instruction fetch and execution are presented in
ing” on page
14.
ATmega48A/PA/88A/PA/168A/PA/328/P
280.
”Memory Programming” on page 297
and
”Boot Loader Support – Read-While-Write
for more details.
”Instruction Execution Tim-
contains a detailed
”Self-Program-
”SPMCSR –
17

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