ATMEGA328P-AU Atmel, ATMEGA328P-AU Datasheet - Page 100

MCU AVR 32K FLASH 32TQFP

ATMEGA328P-AU

Manufacturer Part Number
ATMEGA328P-AU
Description
MCU AVR 32K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA328P-20AU
ATMEGA328P-20AU
Q3790246

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
ATMEGA328P-AU
Manufacturer:
KINGBRIGHT
Quantity:
37 000
Part Number:
ATMEGA328P-AU
Manufacturer:
ATMEL
Quantity:
1 250
Part Number:
ATMEGA328P-AU
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA328P-AU
Manufacturer:
AT
Quantity:
1 000
Part Number:
ATMEGA328P-AU
Manufacturer:
AT
Quantity:
400
Company:
Part Number:
ATMEGA328P-AU
Manufacturer:
ATMEL
Quantity:
35 000
Company:
Part Number:
ATMEGA328P-AU
Manufacturer:
ATMEL
Quantity:
99 800
Part Number:
ATMEGA328P-AU
Manufacturer:
Microchip Technology
Quantity:
33 072
Part Number:
ATMEGA328P-AU
Manufacturer:
ATMEL
Quantity:
9 000
Company:
Part Number:
ATMEGA328P-AU - MCU
Manufacturer:
ATMEL
Quantity:
4 800
Part Number:
ATMEGA328P-AUR
Manufacturer:
Atmel
Quantity:
10 000
Part Number:
ATMEGA328P-AUR
Manufacturer:
Microchip Technology
Quantity:
45 140
Part Number:
ATMEGA328P-AUR
Manufacturer:
ATMEL
Quantity:
9 000
14.6.1
14.7
8271C–AVR–08/10
Modes of Operation
Compare Output Mode and Waveform Generation
Figure 14-4. Compare Match Output Unit, Schematic
The general I/O port function is overridden by the Output Compare (OC0x) from the Waveform
Generator if either of the COM0x1:0 bits are set. However, the OC0x pin direction (input or out-
put) is still controlled by the Data Direction Register (DDR) for the port pin. The Data Direction
Register bit for the OC0x pin (DDR_OC0x) must be set as output before the OC0x value is visi-
ble on the pin. The port override function is independent of the Waveform Generation mode.
The design of the Output Compare pin logic allows initialization of the OC0x state before the out-
put is enabled. Note that some COM0x1:0 bit settings are reserved for certain modes of
operation.
The Waveform Generator uses the COM0x1:0 bits differently in Normal, CTC, and PWM modes.
For all modes, setting the COM0x1:0 = 0 tells the Waveform Generator that no action on the
OC0x Register is to be performed on the next compare match. For compare output actions in the
non-PWM modes refer to
page
A change of the COM0x1:0 bits state will have effect at the first compare match after the bits are
written. For non-PWM modes, the action can be forced to have immediate effect by using the
FOC0x strobe bits.
The mode of operation, i.e., the behavior of the Timer/Counter and the Output Compare pins, is
defined by the combination of the Waveform Generation mode (WGM02:0) and Compare Output
mode (COM0x1:0) bits. The Compare Output mode bits do not affect the counting sequence,
while the Waveform Generation mode bits do. The COM0x1:0 bits control whether the PWM out-
put generated should be inverted or not (inverted or non-inverted PWM). For non-PWM modes
the COM0x1:0 bits control whether the output should be set, cleared, or toggled at a compare
match
For detailed timing information refer to
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
107, and for phase correct PWM refer to
(See Section “14.6” on page
See Section “14.9” on page 107.
COMnx1
COMnx0
FOCn
clk
I/O
Table 14-2 on page
Waveform
Generator
99.).
”Timer/Counter Timing Diagrams” on page
D
D
D
PORT
DDR
OCnx
Table 14-4 on page
107. For fast PWM mode, refer to
Q
Q
Q
1
0
108.
OCnx
Pin
Table 14-3 on
105.
100

Related parts for ATMEGA328P-AU