ATMEGA328P-AU Atmel, ATMEGA328P-AU Datasheet - Page 299

MCU AVR 32K FLASH 32TQFP

ATMEGA328P-AU

Manufacturer Part Number
ATMEGA328P-AU
Description
MCU AVR 32K FLASH 32TQFP
Manufacturer
Atmel
Series
AVR® ATmegar

Specifications of ATMEGA328P-AU

Core Processor
AVR
Core Size
8-Bit
Speed
20MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
23
Program Memory Size
32KB (16K x 16)
Program Memory Type
FLASH
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
1.8 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
32-TQFP, 32-VQFP
Processor Series
ATMEGA32x
Core
AVR8
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
2-Wire, SPI, USART
Maximum Clock Frequency
20 MHz
Number Of Programmable I/os
23
Number Of Timers
3
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
EWAVR, EWAVR-BL
Development Tools By Supplier
ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 8 Channel
Cpu Family
ATmega
Device Core
AVR
Device Core Size
8b
Frequency (max)
20MHz
Total Internal Ram Size
2KB
# I/os (max)
23
Number Of Timers - General Purpose
3
Operating Supply Voltage (typ)
2.5/3.3/5V
Operating Supply Voltage (max)
5.5V
Operating Supply Voltage (min)
1.8V
Instruction Set Architecture
RISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
32
Package Type
TQFP
Controller Family/series
AVR MEGA
No. Of I/o's
23
Eeprom Memory Size
1KB
Ram Memory Size
2KB
Cpu Speed
20MHz
Rohs Compliant
Yes
For Use With
ATSTK600 - DEV KIT FOR AVR/AVR32770-1007 - ISP 4PORT ATMEL AVR MCU SPI/JTAGATAVRDRAGON - KIT DRAGON 32KB FLASH MEM AVR
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Other names
ATMEGA328P-20AU
ATMEGA328P-20AU
Q3790246

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8271C–AVR–08/10
Table 27-7.
Notes:
Table 27-8.
Notes:
ATmega48A/48PA/88A/88PA/168A/168PA/328/328
High Fuse Byte
WDTON
EESAVE
BODLEVEL2
BODLEVEL1
BODLEVEL0
High Fuse Byte
RSTDISBL
DWEN
SPIEN
WDTON
EESAVE
BOOTSZ1
BOOTSZ0
BOOTRST
(2)
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. See
1. See
2. The SPIEN Fuse is not accessible in serial programming mode.
3. See
4. The default value of BOOTSZ[1:0] results in maximum Boot Size. See
(3)
(3)
(1)
page
(4)
(4)
(4)
Fuse High Byte for ATmega48A/48PA/88A/88PA/168A/168PA (Continued)
Fuse High Byte for ATmega328/328P
”Alternate Functions of Port C” on page 86
”WDTCSR – Watchdog Timer Control Register” on page 55
Table 28-13 on page 323
”Alternate Functions of Port C” on page 86
”WDTCSR – Watchdog Timer Control Register” on page 55
303.
Bit No
Bit No
4
3
2
1
0
7
6
5
4
3
2
1
0
Description
Watchdog Timer Always On
EEPROM memory is
preserved through the Chip
Erase
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Brown-out Detector trigger
level
Description
External Reset Disable
debugWIRE Enable
Enable Serial Program and
Data Downloading
Watchdog Timer Always On
EEPROM memory is
preserved through the Chip
Erase
Select Boot Size
(see
Table 26-7 on page
Table 26-10 on page 292
Table 26-13 on page 293
for details)
Select Boot Size
(see
Table 26-7 on page
Table 26-10 on page 292
Table 26-13 on page 293
for details)
Select Reset Vector
for BODLEVEL Fuse decoding.
for description of RSTDISBL Fuse.
for description of RSTDISBL Fuse.
291,
291,
and
and
Default Value
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
1 (unprogrammed)
1 (unprogrammed)
1 (unprogrammed)
Default Value
1 (unprogrammed)
1 (unprogrammed)
0 (programmed, SPI
programming enabled)
1 (unprogrammed)
1 (unprogrammed), EEPROM
not reserved
0 (programmed)
0 (programmed)
1 (unprogrammed)
for details.
for details.
”Pin Name Mapping” on
(4)
(4)
299

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