DSPIC30F3013-30I/SO Microchip Technology, DSPIC30F3013-30I/SO Datasheet

IC DSPIC MCU/DSP 24K 28SOIC

DSPIC30F3013-30I/SO

Manufacturer Part Number
DSPIC30F3013-30I/SO
Description
IC DSPIC MCU/DSP 24K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3013-30I/SO

Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
28-SOIC (7.5mm Width)
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
20
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 10x12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
30
Data Ram Size
2 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT28SO-1 - SOCKET TRANSITION 28SOIC 300MILDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301330ISO

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F3013-30I/SO
Manufacturer:
NSC
Quantity:
340
Part Number:
DSPIC30F3013-30I/SO
Manufacturer:
PIC
Quantity:
20 000
The dsPIC30F3012/3013 (Rev. B1) samples that you
have received were found to conform to the
specifications and functionality described in the
following documents:
• DS70157 – “dsPIC30F/33F Programmer’s
• DS70139 – “dsPIC30F2011/2012/3012/3013 Data
• DS70046 – “dsPIC30F Family Reference Manual”
The exceptions to the specifications in the documents
listed above are described in this section. These
exceptions are described for the specific devices that
are listed below:
• dsPIC30F3012
• dsPIC30F3013
These devices may be identified by the following
message that appears in the MPLAB
Window under MPLAB IDE, when a “Reset and
Connect” operation is performed within MPLAB IDE:
Setting Vdd source to target
Target Device dsPIC30F3013 found,
revision = Rev 0x1041
...Reading ICD Product ID
Running ICD Self Test
...Passed
MPLAB ICD 2 Ready
The errata described in this section will be addressed
in
dsPIC30F3013 devices.
© 2008 Microchip Technology Inc.
Reference Manual”
Sheet”
future
revisions
dsPIC30F3012/3013 Rev. B1 Silicon Errata
of
dsPIC30F3012
®
ICD 2 Output
and
dsPIC30F3012/3013
Silicon Errata Summary
The following list summarizes the errata described in
further detail throughout the remainder of this
document:
1.
2.
3.
4.
5.
6.
7.
8.
9.
MAC Class Instructions with ±4 Address
Modification
Sequential MAC instructions, which prefetch data
from Y data space using ±4 address modification
will cause an address error trap.
Decimal Adjust Instruction
The Decimal Adjust instruction, DAW.b, may
improperly clear the Carry bit, C (SR<0>).
PSV Operations Using SR
In certain instructions, fetching one of the
operands from program memory using Program
Space Visibility (PSV) will corrupt specific bits in
the STATUS Register, SR.
Early Termination of Nested DO Loops
When using two DO loops in a nested fashion,
terminating the inner-level DO loop by setting the
EDT (CORCON<11>) bit will produce unexpected
results.
Sequential Interrupts
Sequential interrupts after modifying the CPU IPL,
interrupt IPL, interrupt enable or interrupt flag may
cause an address error trap.
DISI Instruction
The DISI instruction will not disable interrupts if a
DISI instruction is executed in the same
instruction
decrements to zero.
Output Compare Module in PWM Mode
Output compare will produce a glitch when
loading 0% duty cycle in PWM mode. It will also
miss the next compare after the glitch.
Output Compare
The output compare module will produce a glitch
on the output when an I/O pin is initially set high
and the module is configured to drive the pin low at
a specified time.
INT0, ADC and Sleep Mode
ADC event triggers from the INT0 pin will not
wake-up the device from Sleep mode if the SMPI
bits are non-zero.
cycle
that
the
DS80255F-page 1
DISI
counter

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DSPIC30F3013-30I/SO Summary of contents

Page 1

... These devices may be identified by the following message that appears in the MPLAB Window under MPLAB IDE, when a “Reset and Connect” operation is performed within MPLAB IDE: Setting Vdd source to target Target Device dsPIC30F3013 found, revision = Rev 0x1041 ...Reading ICD Product ID Running ICD Self Test ...Passed ...

Page 2

... SDA and SCL pins, causing a false communication start in a single-master configuration or a bus collision in a multi-master configuration. The following sections describe the errata and work around to these errata, where they may apply. © 2008 Microchip Technology Inc. ® DSC ...

Page 3

... Adding an accumulator write back (a dummy write back if needed) to either of the MAC class instructions not use the + = address modification not prefetch data from Y data space. © 2008 Microchip Technology Inc. dsPIC30F3012/3013 2. Module: CPU – Instruction DAW.b The Decimal Adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR< ...

Page 4

... Result in W4 (3) SR<1:0> bits , Result in W2 (3) SR<1:0> bits (4) SR<15:10> bits CORRECT RESULTS ;Load PSVPAG register ;Enable PSV ;Set up W1 for ;indirect PSV access ;from 0x000200 ;works ok ;Load W2 with data ;from program memory ;Carry flag and W4 ;results are ok! © 2008 Microchip Technology Inc. ...

Page 5

... DISI_PROTECT( __asm__ volatile (“DISI #0x1FFF”);\ X; \ DISICNT = 0; } DISI_PROTECT(SRbits.IPL = 0x5); © 2008 Microchip Technology Inc. dsPIC30F3012/3013 5. Module: Interrupt Controller – Sequential Interrupts When interrupt nesting is enabled (or NSTDIS (INTCON1<15>) bit is ‘0’), the following sequence of events will lead to an address error trap. The generic terms “ ...

Page 6

... When these events occur, the output compare module will drive the pin low for one instruction cycle (T ) after the module is enabled. CY Work around None. However, the user may use a timer interrupt and write to the associated PORT register to control the pin manually. © 2008 Microchip Technology Inc ...

Page 7

... MHz-10 MHz instead of 4 MHz-10 MHz. Work around None PLL mode is used, make sure the input crystal or clock frequency is 5 MHz or greater. © 2008 Microchip Technology Inc. dsPIC30F3012/3013 11. Module: Sleep Mode Execution of the Sleep instruction (PWRSAV #0) may cause incorrect program operation after the device wakes up from Sleep ...

Page 8

... Manual” (DS70046) for more details on performing a clock switch operation. Note: The above work around is recommended for users for whom application hardware changes are possible, and also for users whose includes a 32 kHz LP Oscillator crystal. or Section 29. “Oscillator” application hardware already © 2008 Microchip Technology Inc. ...

Page 9

... This will also clear the RBF flag Clear the I C receiver interrupt flag SI2CF back to step 1 to continue receiving incoming data bytes. © 2008 Microchip Technology Inc. dsPIC30F3012/3013 Work around 2: Use this work around for applications in which the receiver interrupt is required. Assuming that ...

Page 10

... When the I C module is configured as a 10-bit slave with and address of 0x102, the I2CxRCV register content for the lower address byte is 0x01 rather than 0x02; however, acknowledges both address bytes. Work around None. © 2008 Microchip Technology Inc. with the the module ...

Page 11

... For example, if the SDA and SCL pins are shared with the UART and SPI pins, and the UART has higher precedence on the port latch pin. © 2008 Microchip Technology Inc. dsPIC30F3012/3013 2 C module is that ...

Page 12

... Added silicon issues 15 and 16 (I C), and 17 (Timer). Removed silicon issue 9 (Using OSC2/RC15 as Digital I/O or CLKOUT). Revision F (9/2008) 2 Replaced issues 13 and with issue 20 (I Added silicon issues 16 (PLL Lock Status Bit), 17 (PSV 2 Operations) and 18-20 (I C). DS80255F-page 12 C), and 15 (I/O 2 C). © 2008 Microchip Technology Inc. ...

Page 13

... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...

Page 14

... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...

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