DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet
DSPIC30F1010-30I/SO
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DSPIC30F1010-30I/SO Summary of contents
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... Rev. A1 Silicon Errata The dsPIC30F1010/202X (Rev. A1) devices that you received were found to conform to the specifications and functionality described in the following documents: • DS70178 – “dsPIC30F1010/202X Family Data Sheet” • DS70157 – “dsPIC30F/33F Programmer’s Reference Manual” • DS70046 – “dsPIC30F Family Reference Manual” ...
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... PWM outputs to flip to the inverted state. 33. PWM Jitter The PWM output may exhibit an occasional jitter proportional to the operating speed of the dsPIC30F1010/202X device. 34. PWM Override Priority The PWM Fault, Current-Limit and Output Override priorities do not work correctly. 35. Decimal Adjust Instruction The decimal adjust instruction, DAW.b, may improperly clear the Carry bit, C (SR< ...
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... I C Module The BCL bit in I2CSTAT can be cleared only with 16-bit operation and can be corrupted with 1-bit or 8-bit operations on I2CSTAT. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 2 44 Module: 10-bit addressing mode operate at When the I addressing using the same address bits (A10 and A9) as other I work as expected ...
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... Module: ADC Sample and Hold Timing The dedicated ADC sample and hold circuits can be triggered by signals from the PWM module. The dsPIC30F1010/202X data sheet indicates that the resolution of the PWM-ADC sample and hold trigger timing is 8 ns. The existing implementation has a 41.6 ns resolution. In other words, when the PWM-ADC trigger is fired, an ADC sample may occur ...
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... Module: ADC Interrupts The dsPIC30F1010/202X data sheet specifies that each ADC pin pair has its own interrupt vector. These interrupts do not work dsPIC30F1010/202X Rev. A1 devices. Work around Each ADC pin pair can be configured to initiate a global ADC interrupt by setting the corresponding IRQENx bit in the ADCPCx register. The ADBASE ...
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... RB7 functions can be substituted by using other available pins. 9. Module: ADC Module: Conversion Rate The data sheet indicates that the conversion rate for the ADC module is 2.0 Msps. The ADC module on the dsPIC30F1010/202X Rev. A1 silicon has a maximum conversion rate of 1.5 Msps. Work around None. DS80290J-page 6 ® ...
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... PWMxH/L output pin. The GPIO module must be set up in advance for the desired override output states, and the pins must be configured as digital outputs. This includes setting the PORTx and TRISx registers correctly, which correspond to the PWMxH and PWMxL pins. © 2008 Microchip Technology Inc. dsPIC30F1010/202X DS80290J-page 7 ...
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... The EXTREF pin is more susceptible to negative current spikes than the other pins on the dsPIC1010/202X Rev. A1 devices. TABLE 2: EXTREF PIN CONFIGURATIONS SUSCEPTIBLE TO NEGATIVE CURRENT TRANSIENTS Pin Configuration dsPIC30F1010 Digital Input Comparator Input Comparator Reference Analog Input External Timer Input Input Change Notification FIGURE 1: ...
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... Whether the SSx pin ( high or low, the SPI data transfer will be completed and an interrupt will be generated. This applies to the dsPIC30F2023 device only. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. Work around ...
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... Master mode. In this mode, whether the SMP bit is set or cleared, the data is always sampled at the end of data output time. Note: The dsPIC30F1010/202X devices have only one SPI. All references are intended for software compatibility with other dsPIC DSC devices. Work around ...
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... NOSC value for FRC+PLL */ _builtin_write_OSCCONL(1); /* Set OSWEN bit */ /* Continue original program here */ ... } © 2008 Microchip Technology Inc. dsPIC30F1010/202X switch after the device is reset (refer to Section 29. “Oscillator” (DS70268) in the “dsPIC30F drops below DD Family Reference Manual” (DS70046) for details on clock switching). This ensures that the MCLR pin is functional and that the device can be reset by an external BOR circuit (see Figure 2) ...
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... Module: UART Module With the parity option enabled, a parity error, indicated by the PERR bit (UxSTA<3>) being set, may occur if the Baud Rate Generator contains an odd value. This affects both even and odd parity options. Work around Load the Baud Rate Generator register, UxBRG, with an even value, or disable the peripheral’ ...
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... The operation of this bit is the inverse of the stated operation “dsPIC30F1010/202X Device (DS70178). The signal received from an IrDA transceiver can have an idle state of ‘1’ or ‘0’. Table 3 summarizes how UART receptions will occur when used with the IrDA decoder ...
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... The Power Supply PWM module has a feature to enable immediate duty cycle updates. This feature is enabled by setting IUE = 1 in the PWMCONx register. The “dsPIC30F1010/202X Device Data Sheet” (DS70178) states that the minimum PWM duty cycle value is 0x0010. Duty cycle values less ...
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... Module: PWM Override Priority The “dsPIC30F1010/202X Device Data Sheet” (DS70178) states the priority of PWMx pin ownership as: • PWM Generator (lowest priority) • Output Override • Current-Limit Override • Fault Override • PENx (GPIO/PWM) ownership (highest priority) Instead of following the above priority scheme, the PWMx pin ownership is determined by ANDing the Output Override Data bits (OVRDAT< ...
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... Module: Sleep Mode Execution of the Sleep instruction (PWRSAV #0) may cause incorrect program operation after the device wakes up from Sleep. The current consumption during Sleep may also increase beyond the specifications listed in the device data sheet. Work arounds To avoid this issue, any of the following three work arounds can be implemented, depending on the application requirements ...
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... PWM module will stop generating the ADC trigger before the module relinquishes control of the PWM pins. Work around None. © 2008 Microchip Technology Inc. dsPIC30F1010/202X 38. Module: PWM Module In Push-Pull mode, with immediate updates enabled, the PWM pins may become swapped. Work around If using the PWM module in Push-Pull mode, ...
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... Module Module 2 If there are two I C devices on the bus, one of them is acting as the Master receiver and the other as the Slave transmitter. Suppose that both devices are configured for 10-bit addressing mode, and have the same value in the A10 and A9 bits of their addresses ...
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... Added silicon issues 37 (PWM Module), 38 (PWM Module), 39 (Power Supply PWM), Module), 41 (UART Module), 42 (SPI Module Module), and Module). Revision J (7/2008) Updated silicon issue 37 (PWM Module) and added 2 2 issues Module Module), 47 (UART (FIFO Error Flags)) and 48 (PSV Operations). © 2008 Microchip Technology Inc. dsPIC30F1010/202X 40 (UART DS80290J-page 19 ...
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... NOTES: DS80290J-page 20 © 2008 Microchip Technology Inc. ...
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... PowerMate, PowerTool, REAL ICE, rfLAB, Select Mode, Total Endurance, UNI/O, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-572-9526 Fax: 886-3-572-6459 Taiwan - Kaohsiung Tel: 886-7-536-4818 Fax: 886-7-536-4803 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2008 Microchip Technology Inc. 01/02/08 ...