DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 110

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
FIGURE 12-1:
DS70178C-page 108
ALTDTRx, DTRx
PWMCONx
Comparator
Comparator
Comparator
Comparator
SEVTCMP
FLTCONx
LEBCONx
TRGCONx
Comparator
IOCONx
Phase
Phase
PTPER
PTCON
Timer
Phase
Phase
Latch
Timer
Timer
Timer
PTMR
Latch
Latch
Latch
PDC1
MUX
PDC3
PDC2
MUX
PDC4
MUX
MUX
SIMPLIFIED CONCEPTUAL BLOCK DIAGRAM OF POWER SUPPLY PWM
PWM GEN #1
PWM GEN #2
PWM GEN #3
PWM GEN #4
Timer Period
Master Time Base
Special event
comparison value
Pin override control
Pin and mode control
Control for blanking external input signals
Dead-time Control
ADC Trigger Control
PWM enable and mode control
MDC
Preliminary
Master Duty Cycle Reg
Fault mode and pin control
External Time Base
Special Event
Synchronization
Postscaler
Dead-time Generator
Dead-time Generator
Dead-time Generator
Dead-time Generator
Channel 2
Channel 1
Channel 3
Channel 4
Special Event
Trigger
© 2006 Microchip Technology Inc.
Fault Control
Logic
PWM3H
PWM3L
PWM4H
PWM4L
SFLT
SYNCO
SYNCI
IFLT
PWM1H
PWM2H
PWM1L
PWM2L
X
X