DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 189

IC DSPIC MCU/DSP 6K 28SOIC

DSPIC30F1010-30I/SO

Manufacturer Part Number
DSPIC30F1010-30I/SO
Description
IC DSPIC MCU/DSP 6K 28SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
6KB (2K x 24)
Program Memory Type
FLASH
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 5.5 V
Data Converters
A/D 6x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC30
Maximum Speed
30 MHz
Operating Supply Voltage
3.3|5 V
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
6-chx10-bit
Number Of Timers
2
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC30F1010-30I/SO
Manufacturer:
Microchip Technology
Quantity:
135
Part Number:
DSPIC30F1010-30I/SO
Manufacturer:
MICROCHIP/微芯
Quantity:
20 000
Company:
Part Number:
DSPIC30F1010-30I/SO
Quantity:
55
FIGURE 16-4:
© 2006 Microchip Technology Inc.
adc_clk
sample_even
sample_odd
sample_odd
connectx_en
connect_second
convert_en
capture_first_data
capture_second_data
state counter
Note 1: For all analog input pairs that do not have dedicated sample and hold circuits, the common sample and hold circuit
0
2: For all analog input pairs that have dedicated sample and hold circuits, the common sample and hold circuit samples
1
(1)
(2)
samples the input at the start of the first and second conversions. Therefore, the samples are sequential, not
simultaneous.
the input at the start of the first conversion so that both samples (odd and even) are near simultaneous.
10th 9th 8th
Dependent on S&H availability
2
connect_common
3
DETAILED CONVERSION SEQUENCE TIMINGS, SEQSAMP = 1
4
T
7th
AD
5
6th
6
5th
7
4th
8
3rd 2nd 1st
9
Preliminary
10
11
12
13
dsPIC30F1010/202X
10th 9th 8th
14
15
16
17
7th
18
6th
19
5th
20
4th
DS70178C-page 187
21
3rd 2nd 1st
22
23
0

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