DSPIC30F1010-30I/SO Microchip Technology, DSPIC30F1010-30I/SO Datasheet - Page 222

• Manufacturer Part Number: DSPIC30F1010-30I/SO
• Description: IC DSPIC MCU/DSP 6K 28SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 30Fr

Specifications of DSPIC30F1010-30I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 30 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 6KB (2K x 24)
• Program Memory Type: FLASH
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 5.5 V
• Data Converters: A/D 6x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Data Bus Width: 16 bit
• Processor Series: DSPIC30F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240002, DM300023, DM330011
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC30
• Maximum Speed: 30 MHz
• Operating Supply Voltage: 3.3|5 V
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 6-chx10-bit
• Number Of Timers: 2
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: DM300023 - KIT DEMO DSPICDEM SMPS BUCKDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

dsPIC30F1010/202X
Most single-word instructions are executed in a single
instruction cycle, unless a conditional test is true or the
Program Counter is changed as a result of the instruc-
tion. In these cases, the execution takes two instruction
cycles with the additional instruction cycle(s) executed
as a NOP. Notable exceptions are the BRA (uncondi-
tional/computed branch), indirect CALL/GOTO, all
Table Reads and Writes and RETURN/RETFIE instruc-
tions, which are single-word instructions, but take two
or three cycles. Certain instructions that involve
skipping over the subsequent instruction, require either
TABLE 19-1:
DS70178C-page 220
#text
(text)
[text]
{
<n:m>
.b
.d
.S
.w
Acc
AWB
bit4
C, DC, N, OV, Z
Expr
f
lit1
lit4
lit5
lit8
lit10
lit14
lit16
lit23
None
OA, OB, SA, SB
PC
Slit10
Slit16
Slit6
}
Field
SYMBOLS USED IN OPCODE DESCRIPTIONS
Means literal defined by “text”
Means “content of text”
Means “the location addressed by text”
Optional field or operation
Register bit field
Byte mode selection
Double Word mode selection
Shadow register select
Word mode selection (default)
One of two accumulators {A, B}
Accumulator write back destination address register
4-bit bit selection field (used in word addressed instructions)
MCU Status bits: Carry, Digit Carry, Negative, Overflow, Zero
Absolute address, label or expression (resolved by the linker)
File register address
1-bit unsigned literal
4-bit unsigned literal
5-bit unsigned literal
8-bit unsigned literal
10-bit unsigned literal
14-bit unsigned literal
16-bit unsigned literal
23-bit unsigned literal
Field does not require an entry, may be blank
DSP Status bits: ACCA Overflow, ACCB Overflow, ACCA Saturate, ACCB Saturate
Program Counter
10-bit signed literal
16-bit signed literal
6-bit signed literal
Preliminary
{-16...16}
{-512...511}
{-32768...32767}
{0,1}
{0...15}
{0...31}
{0...255}
{0x0000...0x1FFF}
{0...255} for Byte mode, {0:1023} for Word mode
{0...16384}
{0...65535}
{0...8388608}; LSB must be ‘0’
two or three cycles if the skip is performed, depending
on whether the instruction being skipped is a single-
word or two-word instruction. Moreover, double word
moves
instructions execute in two instruction cycles.
Note:
Description
require
For more details on the instruction set,
refer to the “dsPIC30F/33F Programmer’s
Reference Manual” (DS70157).
two
{W13, [W13] + = 2}
© 2006 Microchip Technology Inc.
cycles.
{0...15}
The
double
word