DSPIC33FJ16GS502-I/SO Microchip Technology, DSPIC33FJ16GS502-I/SO Datasheet - Page 138

• Manufacturer Part Number: DSPIC33FJ16GS502-I/SO
• Description: IC DSPIC MCU/DSP 16K 28-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 16KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
8.1
The dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/
X04 devices provide six system clock options:
• Fast RC (FRC) Oscillator
• FRC Oscillator with PLL
• Primary (XT, HS or EC) Oscillator
• Primary Oscillator with PLL
• Low-Power RC (LPRC) Oscillator
• FRC Oscillator with Postscaler
8.1.1
The Fast RC (FRC) internal oscillator runs at a nominal
frequency of 7.37 MHz. User software can tune the
FRC frequency. User software can optionally specify a
factor (ranging from 1:2 to 1:256) by which the FRC
clock frequency is divided. This factor is selected using
the FRCDIV<2:0> (CLKDIV<10:8>) bits.
The primary oscillator can use one of the following as
its clock source:
• XT (Crystal): Crystals and ceramic resonators in
• HS (High-Speed Crystal): Crystals in the range of
• EC (External Clock): The external clock signal is
The LPRC internal oscIllator runs at a nominal
frequency of 32.768 kHz. It is also used as a reference
clock by the Watchdog Timer (WDT) and Fail-Safe
Clock Monitor (FSCM).
The clock signals generated by the FRC and primary
oscillators can be optionally applied to an on-chip
Phase-Locked Loop (PLL) to provide a wide range of
TABLE 8-1:
DS70318D-page 136
Fast RC Oscillator with Divide-by-N (FRCDIVN)
Fast RC Oscillator with Divide-by-16 (FRCDIV16)
Low-Power RC Oscillator (LPRC)
Reserved
Primary Oscillator (HS) with PLL (HSPLL)
Primary Oscillator (XT) with PLL (XTPLL)
Primary Oscillator (EC) with PLL (ECPLL)
Primary Oscillator (HS)
Primary Oscillator (XT)
Primary Oscillator (EC)
Fast RC Oscillator with PLL (FRCPLL)
Fast RC Oscillator (FRC)
Note 1:
the range of 3 MHz to 10 MHz. The crystal is
connected to the OSC1 and OSC2 pins.
10 MHz to 40 MHz. The crystal is connected to
the OSC1 and OSC2 pins.
directly applied to the OSC1 pin.
2:
CPU Clocking System
OSC2 pin function is determined by the OSCIOFNC Configuration bit.
This is the default oscillator mode for an unprogrammed (erased) device.
SYSTEM CLOCK SOURCES
Oscillator Mode
CONFIGURATION BIT VALUES FOR CLOCK SELECTION
Preliminary
Oscillator Source POSCMD<1:0> FNOSC<2:0>
Reserved
Primary
Internal
Internal
Internal
Primary
Primary
Primary
Primary
Primary
Internal
Internal
output
configuration is described in Section 8.1.3 “PLL Con-
figuration”.
The FRC frequency depends on the FRC accuracy
(see Table 24-20) and the value of the FRC Oscillator
Tuning register (see Register 8-4).
8.1.2
The oscillator source used at a device Power-on Reset
event is selected using Configuration bit settings. The
oscillator Configuration bit settings are located in the
Configuration registers in the program memory. (Refer
to Section 21.1 “Configuration Bits” for further
details.) The Initial Oscillator Selection Configuration
bits, FNOSC<2:0> (FOSCSEL<2:0>), and the Primary
Oscillator
POSCMD<1:0> (FOSC<1:0>), select the oscillator
source that is used at a Power-on Reset. The FRC
primary oscillator is the default (unprogrammed)
selection.
The Configuration bits allow users to choose among
12 different clock modes, shown in Table 8-1.
The output of the oscillator (or the output of the PLL if
a PLL mode has been selected), F
to generate the device instruction clock (F
peripheral clock time base (F
operating speed of the device and speeds up to 40
MHz are supported by the dsPIC33FJ06GS101/X02
and dsPIC33FJ16GSX02/X04 architecture.
Instruction execution speed or device operating
frequency, F
EQUATION 8-1:
frequencies
SYSTEM CLOCK SELECTION
CY
Mode
, is given by Equation 8-1.
xx
xx
xx
xx
10
01
00
10
01
00
xx
xx
F
CY
DEVICE OPERATING
FREQUENCY
Select
for
© 2009 Microchip Technology Inc.
= F
OSC
device
/2
111
110
101
100
011
011
011
010
010
010
001
000
P
Configuration
). F
OSC
operation.
CY
, is divided by 2
defines the
CY
) and the
Note
1, 2
—
—
—
—
—
1
1
1
1
1
1
PLL
bits,