DSPIC33FJ16GS502-I/SO Microchip Technology, DSPIC33FJ16GS502-I/SO Datasheet - Page 159

IC DSPIC MCU/DSP 16K 28-SOIC

DSPIC33FJ16GS502-I/SO

Manufacturer Part Number
DSPIC33FJ16GS502-I/SO
Description
IC DSPIC MCU/DSP 16K 28-SOIC
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-I/SO

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
21
Program Memory Size
16KB (16K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 8x10b; D/A 1x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
28-SOIC (7.5mm Width)
Core Frequency
40MHz
Core Supply Voltage
3.3V
Embedded Interface Type
I2C, SPI, UART
No. Of I/o's
21
Flash Memory Size
16KB
Supply Voltage Range
3V To 3.6V
Package
28SOIC W
Device Core
dsPIC
Family Name
dsPIC33
Maximum Speed
40 MHz
Operating Supply Voltage
3.3 V
Data Bus Width
16 Bit
Number Of Programmable I/os
21
Interface Type
I2C/SPI/UART
On-chip Adc
8-chx10-bit
Number Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

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10.4
Peripheral pin select configuration enables peripheral
set selection and placement on a wide range of I/O
pins. By increasing the pinout options available on a
particular device, programmers can better tailor the
microcontroller to their entire application, rather than
trimming the application to fit the device.
The peripheral pin select configuration feature operates
over a fixed subset of digital I/O pins. Programmers can
independently map the input and/or output of most
digital peripherals to any one of these I/O pins.
Peripheral pin select is performed in software, and gen-
erally does not require the device to be reprogrammed.
Hardware safeguards are included that prevent acciden-
tal or spurious changes to the peripheral mapping, once
it has been established.
10.4.1
The peripheral pin select feature is used with a range
of up to 30 pins. The number of available pins depends
on the particular device and its pin count. Pins that
support the peripheral pin select feature include the
designation “RPn” in their full pin designation, where
“RP” designates a remappable peripheral and “n” is the
remappable pin number.
10.4.2
Peripheral pin select features are controlled through
two sets of Special Function Registers: one to map
peripheral inputs and one to map outputs. Because
they are separately controlled, a particular peripheral’s
input and output (if the peripheral has both) can be
placed on any selectable function pin without
constraint.
The association of a peripheral to a peripheral select-
able pin is handled in two different ways, depending on
whether an input or output is being mapped.
© 2009 Microchip Technology Inc.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
Peripheral Pin Select
AVAILABLE PINS
CONTROLLING PERIPHERAL PIN
SELECT
Preliminary
10.4.2.1
The inputs of the peripheral pin select options are
mapped on the basis of the peripheral. A control
register associated with a peripheral dictates the pin it
will be mapped to. The RPINRx registers are used to
configure peripheral input mapping (see Register 10-1
through Register 10-14). Each register contains sets of
6-bit fields, with each set associated with one of the
remappable
peripheral’s bit field with an appropriate 6-bit value
maps the RPn pin with that value to that peripheral. For
any given device, the valid range of values for any bit
field corresponds to the maximum number of peripheral
pin selections supported by the device.
Figure 10-2 Illustrates remappable pin selection for
U1RX input.
FIGURE 10-2:
Note:
RP33
RP0
RP1
RP2
For input mapping only, the Peripheral Pin
Select (PPS) functionality does not have
priority over the TRISx settings. Therefore,
when configuring the RPx pin for input, the
corresponding bit in the TRISx register
must also be configured for input (i.e., set
to ‘1’).
Input Mapping
peripherals.
REMAPPABLE MUX
INPUT FOR U1RX
U1RXR<5:0>
33
Programming
0
1
2
U1RX Input
to Peripheral
DS70318D-page 157
a
given

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