DSPIC33FJ16GS502-I/SO Microchip Technology, DSPIC33FJ16GS502-I/SO Datasheet - Page 335

• Manufacturer Part Number: DSPIC33FJ16GS502-I/SO
• Description: IC DSPIC MCU/DSP 16K 28-SOIC
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS502-I/SO

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 21
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: FLASH
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 8x10b; D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 28-SOIC (7.5mm Width)
• Core Frequency: 40MHz
• Core Supply Voltage: 3.3V
• Embedded Interface Type: I2C, SPI, UART
• No. Of I/o's: 21
• Flash Memory Size: 16KB
• Supply Voltage Range: 3V To 3.6V
• Package: 28SOIC W
• Device Core: dsPIC
• Family Name: dsPIC33
• Maximum Speed: 40 MHz
• Operating Supply Voltage: 3.3 V
• Data Bus Width: 16 Bit
• Number Of Programmable I/os: 21
• Interface Type: I2C/SPI/UART
• On-chip Adc: 8-chx10-bit
• Number Of Timers: 3
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant, Lead free / RoHS Compliant

Revision C and D (March 2009)
This revision includes minor typographical and
formatting changes throughout the data sheet text.
Global changes include:
• Changed all instances of OSCI to OSC1 and
• Changed all instances of PGCx/EMUCx and
• Changed all instances of V
Other major changes are referenced by their respective
section in the following table.
TABLE A-2:
© 2009 Microchip Technology Inc.
“High-Performance, 16-Bit Digital
Signal Controllers”
Section 1.0 “Device Overview”
Section 2.0 “Guidelines for Getting
Started with 16-bit Digital Signal
Controllers”
Section 3.0 “CPU”
Section 4.0 “Memory Organization”
Section 5.0 “Flash Program
Memory”
OSCO to OSC2
PGDx/EMUDx (where x = 1, 2, or 3) to PGECx
and PGEDx
V
CAP
to V
CAP
Section Name
/V
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
DDCORE
MAJOR SECTION UPDATES
DDCORE
and V
Added “Application Examples” to list of features
Updated all pin diagrams to denote the pin voltage tolerance (see “Pin
Diagrams”).
Added Note 2 to the 28-Pin QFN-S and 44-Pin QFN pin diagrams, which
references pin connections to V
Added ACMP1-ACMP4 pin names and Peripheral Pin Select capability
column to Pinout I/O Descriptions (see Table 1-1).
Added new section to the data sheet that provides guidelines on getting
started with 16-bit Digital Signal Controllers.
Updated CPU Core Block Diagram with a connection from the DSP Engine
to the Y Data Bus (see Figure 3-1).
Vertically extended the X and Y Data Bus lines in the DSP Engine Block
Diagram (see Figure 3-3).
Updated Reset value for ADCON in Table 4-25.
Removed reference to dsPIC33FJ06GS102 devices in the PMD Register
Map and updated bit definitions for PMD1 and PMD6, and removed PMD7
(see Table 4-43).
Added a new PMD Register Map, which references dsPIC33FJ06GS102
devices (see Table 4-44).
Updated RAM stack address and SPLIM values in the third paragraph of
Section 4.2.6 “Software Stack”
Removed Section 4.2.7 “Data Ram Protection Feature”.
Updated Section 5.3 “Programming Operations” with programming time
formula.
DDCORE
Preliminary
/
Update Description
SS
.
DS70318D-page 333