DSPIC30F3011-30I/PT Microchip Technology, DSPIC30F3011-30I/PT Datasheet - Page 148

IC DSPIC MCU/DSP 24K 44TQFP

DSPIC30F3011-30I/PT

Manufacturer Part Number
DSPIC30F3011-30I/PT
Description
IC DSPIC MCU/DSP 24K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F3011-30I/PT

Program Memory Type
FLASH
Program Memory Size
24KB (8K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Eeprom Size
1K x 8
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Maximum Clock Frequency
30 MHz
Data Ram Size
1024 B
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM330011, DM300018
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT80PT3 - SOCKET TRAN ICE 80MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F301130IPT

Available stocks

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0
dsPIC30F3010/3011
20.3.1.1
The oscillator start-up circuitry is not linked to the POR
circuitry. Some
frequency crystals) will have a relatively long start-up
time. Therefore, one or more of the following conditions
is possible after the POR timer and the PWRT have
expired:
• The oscillator circuit has not begun to oscillate.
• The Oscillator Start-up Timer has NOT expired (if
• The PLL has not achieved a LOCK (if PLL is
If the FSCM is enabled and one of the above conditions
is true, then a clock failure trap will occur. The device
will automatically switch to the FRC oscillator and the
user can switch to the desired crystal oscillator in the
trap ISR.
20.3.1.2
If the FSCM is disabled and the Power-up Timer
(PWRT) is also disabled, then the device will exit
rapidly from Reset on power-up. If the clock source is
FRC, LPRC, EXTRC or EC, it will be active
immediately.
If the FSCM is disabled and the system clock has not
started, the device will be in a frozen state at the Reset
vector until the system clock starts. From the user’s
perspective, the device will appear to be in Reset until
a system clock is available.
20.3.2
The BOR (Brown-out Reset) module is based on an
internal voltage reference circuit. The main purpose of
the BOR module is to generate a device Reset when
a brown-out condition occurs. Brown-out conditions
are generally caused by glitches on the AC mains
(i.e., missing portions of the AC cycle waveform due
to bad power transmission lines or voltage sags due
to excessive current draw when a large inductive load
is turned on).
The BOR module allows selection of one of the
following voltage trip points:
• 2.6V-2.71V
• 4.1V-4.4V
• 4.58V-4.73V
DS70141F-page 148
a crystal oscillator is used).
used).
Note:
BOR: PROGRAMMABLE
BROWN-OUT RESET
The BOR voltage trip points indicated here
are nominal values provided for design
guidance only.
POR with Long Crystal Start-up Time
(with FSCM Enabled)
Operating without FSCM and PWRT
crystal
circuits (especially low-
A BOR will generate a Reset pulse which will reset the
device. The BOR will select the clock source, based on
the device Configuration bit values (FOS<1:0> and
FPR<3:0>). Furthermore, if an oscillator mode is
selected, the BOR will activate the Oscillator Start-up
Timer (OST). The system clock is held until OST
expires. If the PLL is used, then the clock will be held
until the LOCK bit (OSCCON<5>) is ‘1’.
Concurrently, the POR time-out (T
time-out (T
Reset is released. If T
being used, then a nominal delay of T
applied. The total delay in this case is (T
The BOR status bit (RCON<1>) will be set to indicate
that a BOR has occurred. The BOR circuit, if enabled,
will continue to operate while in Sleep or Idle modes
and will reset the device should V
threshold voltage.
FIGURE 20-6:
Note:
Note 1: External Power-on Reset circuit is
2: R should be suitably chosen so as to
3: R1 should be suitably chosen so as to
PWRT
Dedicated supervisory devices, such as
the MCP1XX and MCP8XX, may also be
used as an external Power-on Reset
circuit.
required only if the V
is too slow. The diode D helps discharge
the capacitor quickly when V
down.
make sure that the voltage drop across
R does not violate the device’s electrical
specification.
limit any current flowing into MCLR from
external capacitor C, in the event of
MCLR/V
Electrostatic
Electrical Overstress (EOS).
D
V
) will be applied before the internal
DD
R
C
PP
PWRT
EXTERNAL POWER-ON
RESET CIRCUIT (FOR
SLOW V
© 2010 Microchip Technology Inc.
pin breakdown due to
= 0 and a crystal oscillator is
R1
Discharge
DD
DD
DD
POR
dsPIC30F
MCLR
fall below the BOR
POWER-UP)
power-up slope
FSCM
) and the PWRT
POR
(ESD)
DD
= 100 μs is
+ T
powers
FSCM
or
).

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