DSPIC33FJ16GS504-I/PT Microchip Technology, DSPIC33FJ16GS504-I/PT Datasheet
DSPIC33FJ16GS504-I/PT
Specifications of DSPIC33FJ16GS504-I/PT
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DSPIC33FJ16GS504-I/PT Summary of contents
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... Note 1: The Device and Revision IDs (DEVID and DEVREV) are located at the last two implemented addresses in program memory. 2: Refer to the “dsPIC33F/PIC24H Flash Programming Specification” (DS70152) for detailed information on Device and Revision IDs for your specific device. ...
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... A9) as other I devices, the A10 and A9 bits may not work as expected. The PWM module may fail to trigger a conversion on certain ADC pairs when the primary or secondary PWMx generator is selected as a trigger source. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
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... Reserved — 33. Note 1: Only those issues indicated in the last column apply to the current silicon revision. © 2010 Microchip Technology Inc. Issue Summary When using the PGEC3/PGED3 pins for device programming, the programming time may be slower as compared to other available PGECx/PGEDx pin pairs. ...
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... When the PWM duty cycle update coincides with the PWM period rollover, the PWM output may be corrupted for one PWM period. In JTAG mode, the TMS pin will not have an active pull-up as required by the JTAG specification. Affected (1) Revisions © 2010 Microchip Technology Inc. ...
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... Affected Silicon Revisions © 2010 Microchip Technology Inc. 3. Module: PWM If PWM fault interrupts are disabled (FLTIEN = 0 or CLIEN = 0), then associated Status bits (FLTSTAT and CLSTAT) will not function. Work around Enable PWM fault interrupts CLIEN = 1) ...
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... FCLCONx register, causes all other bits of the high byte to be loaded with zeros. Work around Use Word writes for the FCLCONx register instead of bit or byte writes. Affected Silicon Revisions when both modes are used © 2010 Microchip Technology Inc. ...
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... Affected Silicon Revisions © 2010 Microchip Technology Inc. 12. Module: Auxiliary Clock When the PWMMD bit in the PMD1 register is set, the Auxiliary Clock to both the ADC and PWM modules is disabled. Work around To disable the Auxiliary clock for the PWM module but not for the ADC module, set the individual PWM generator PMD bits in the PMD6 register ...
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... Work around 2: Configure the PWM Input Clock Prescaler bits (PCLKDIV) for divide higher. Work around 3: Utilize other available trigger sources, such as software or timer triggers, to initiate conversion on the affected ADC convert pairs. Affected Silicon Revisions © 2010 Microchip Technology Inc. Example 1 for ...
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... Center-Aligned mode. Work around None. Affected Silicon Revisions © 2010 Microchip Technology Inc. 21. Module: PWM During Blanking (LEB) is triggered to start counting at a rising edge of PWM and the PWM module has a blanking time period less than the PWM assertive time (T ON during the T T ...
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... Push-Pull mode may not remain synchronized with other PWM output modes. Work around When multiple PWM channels are operating in Independent Time Base mode, immediate updates to the PWM module (IUE = 1) must be enabled for PWM channels to remain synchronized. Affected Silicon Revisions © 2010 Microchip Technology Inc. ...
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... EXAMPLE 2: AD1CON1bits.ADON = 0; __asm__ volatile ("REPEAT #50"); __asm__ volatile ("NOP"); Sleep(); © 2010 Microchip Technology Inc. Work around Use the internal FRC oscillator as the input to the Voltage Auxiliary PLL, or use the external oscillator with a frequency of 7.37 MHz. Affected Silicon Revisions ...
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... PTCON<PTEN> Remove the PWM Overrides by making IOCONx<OVRENH> = IOCONx<OVRENL> Assign pin ownership to the PWM module by setting IOCONx<PENH> IOCONx<PENL> The code Example 3 illustrates the use of this work around. Affected Silicon Revisions © 2010 Microchip Technology Inc. and by setting and by setting and 0 = and 1 ...
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... PWMCONx<IUE> Affected Silicon Revisions © 2010 Microchip Technology Inc. 35. Module: JTAG In JTAG mode, the TMS pin will not have an active pull-up as required by the JTAG specification. Instead, the pull-up function will be enabled on the TCK pin. Note: Work around An external pull-up resistor can be connected to the TMS pin to ensure that the signal does not enter a tri-state condition when in JTAG mode ...
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... Industrial ≤ +125°C for Extended Conditions (3) 3.3V 10 MIPS (3) 3.3V 16 MIPS (3) 3.3V 20 MIPS (3) 3.3V 30 MIPS 3.3V 40 MIPS . SS © 2010 Microchip Technology Inc. ...
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... SDAx, SCLx DI19 SDAx, SCLx V Input High Voltage IH DI28 SDAx, SCLx DI29 SDAx, SCLx © 2010 Microchip Technology Inc. ) HPIN Standard Operating Conditions: 3.0V to 3.6V (unless otherwise stated) -40°C ≤ T ≤ +85°C for Industrial Operating temperature A -40°C ≤ T ≤ +125°C for Extended ...
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... Added revision A4 silicon information to all tables. Updated the work arounds for silicon issue 31 (ADC). Removed silicon issue 33 (PWM) and marked its location as reserved. Added silicon issues 34 (PWM) and 35 (JTAG). DS80439H-page 16 )). IDLE 2 (I C), 26 PLL). (High Speed © 2010 Microchip Technology Inc. ...
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... PICtail, REAL ICE, rfLAB, Select Mode, Total Endurance, TSHARC, UniWinDriver, WiperLock and ZENA are trademarks of Microchip Technology Incorporated in the U.S.A. and other countries. SQTP is a service mark of Microchip Technology Incorporated in the U.S.A. All other trademarks mentioned herein are property of their respective companies. ...
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... Philippines - Manila Tel: 63-2-634-9065 Fax: 63-2-634-9069 Singapore Tel: 65-6334-8870 Fax: 65-6334-8850 Taiwan - Hsin Chu Tel: 886-3-6578-300 Fax: 886-3-6578-370 Taiwan - Kaohsiung Tel: 886-7-213-7830 Fax: 886-7-330-9305 Taiwan - Taipei Tel: 886-2-2500-6610 Fax: 886-2-2508-0102 Thailand - Bangkok Tel: 66-2-694-1351 Fax: 66-2-694-1350 © 2010 Microchip Technology Inc. 08/04/10 ...