DSPIC33FJ16GS504-I/PT Microchip Technology, DSPIC33FJ16GS504-I/PT Datasheet - Page 201

• Manufacturer Part Number: DSPIC33FJ16GS504-I/PT
• Description: IC DSPIC MCU/DSP 16K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS504-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

FIGURE 15-2:
15.3
The following registers control the operation of the
high-speed PWM module.
• PTCON: PWM Time Base Control Register
• PTCON2: PWM Clock Divider Select Register
• PTPER: PWM Master Time Base Register(1)
• SEVTCMP: PWM Special Event Compare
• MDC: PWM Master Duty Cycle Register
• PWMCONx: PWMx Control Register
• PDCx: PWMx Generator Duty Cycle Register
• PHASEx: PWMx Primary Phase Shift Register
• DTRx: PWMx Dead-Time Register
• ALTDTRx: PWMx Alternate Dead-Time Register
© 2009 Microchip Technology Inc.
Register
(PHASEx Register provides the local time base
period for PWMxH)
Control Registers
PWM Duty Cycle Register
Fault Pin
Duty Cycle Comparator
Timer/Counter
Phase Offset
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
PARTITIONED OUTPUT PAIR, COMPLEMENTARY PWM MODE
Fault Pin Assignment Logic
TMR < PDC
Channel Override Values
Preliminary
Override
PWM
Logic
Fault Override Values
Fault Active
• SDCx: PWMx Secondary Duty Cycle Register
• SPHASEx: PWMx Secondary Phase Shift
• TRGCONx: PWMx Trigger Control Register
• IOCONx: PWMx I/O Control Register
• FCLCONx: PWMx Fault Current-Limit Control
• TRIGx: PWMx Primary Trigger Compare Value
• STRIGx: PWMx Secondary Trigger Compare
• LEBCONx: Leading-Edge Blanking Control
• PWMCAPx: Primary PWMx Time Base Capture
Register (Provides the local time base for
PWMxL)
Register
Register
Value Register
Register
Register
Dead-Time
Logic
M
U
M
X
U
X
DS70318D-page 199
PWM
PWM
X
X
H
L