DSPIC33FJ16GS504-I/PT Microchip Technology, DSPIC33FJ16GS504-I/PT Datasheet - Page 225

• Manufacturer Part Number: DSPIC33FJ16GS504-I/PT
• Description: IC DSPIC MCU/DSP 16K 44-TQFP
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ16GS504-I/PT

• Program Memory Type: FLASH
• Program Memory Size: 16KB (16K x 8)
• Package / Case: 44-TQFP, 44-VQFP
• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 35
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 12x10b, D/A 1x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Product: DSCs
• Data Bus Width: 16 bit
• Processor Series: DSPIC33F
• Core: dsPIC
• Maximum Clock Frequency: 40 MHz
• Number Of Programmable I/os: 35
• Data Ram Size: 2 KB
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

17.0
The Inter-Integrated Circuit (I
complete hardware support for both Slave and
Multi-Master modes of the I
standard with a 16-bit interface.
The I
• The SCLx pin is clock.
• The SDAx pin is data.
The I
• I
• I
• I
• I
• Serial clock synchronization for I
• I
17.1
The hardware fully implements all the master and slave
functions of the I
specifications, as well as 7-bit and 10-bit addressing.
The I
master on an I
The following types of I
• I
• I
• I
For details about the communication sequence in each
of these modes, refer to the “dsPIC33F Family
Reference Manual”. Please see the Microchip web site
(www.microchip.com) for the latest “dsPIC33F Family
Reference Manual” chapters.
© 2009 Microchip Technology Inc.
Note:
modes of operation.
10-bit addressing.
10-bit addressing.
master and slaves.
used as a handshake mechanism to suspend and
resume serial transfer (SCLREL control).
collision and arbitrates accordingly.
2
2
2
2
2
2
2
2
C interface supporting both Master and Slave
C Slave mode supports 7-bit and
C Master mode supports 7-bit and
C port allows bidirectional transfers between
C supports multi-master operation, detects bus
C slave operation with 7-bit addressing
C slave operation with 10-bit addressing
C master operation with 7-bit or 10-bit addressing
2
2
2
C module has a 2-pin interface:
C module offers the following key features:
C module can operate either as a slave or a
INTER-INTEGRATED CIRCUIT
(I
Operating Modes
2
This data sheet summarizes the features
of
dsPIC33FJ16GSX02/X04
devices. It is not intended to be a
comprehensive reference source.
complement the information in this data
sheet, refer to the “dsPIC33F Family
Reference
“Inter-Integrated
(DS70195), which is available on the
Microchip web site (www.microchip.com).
C™)
2
C bus.
dsPIC33FJ06GS101/X02 and dsPIC33FJ16GSX02/X04
the
2
C Standard and Fast mode
dsPIC33FJ06GS101/X02
2
C operation are supported:
Manual”,
2
C serial communication
2
C) module provides
Circuit
2
C port can be
Section
families
(I
2
C™)”
and
19.
Preliminary
To
of
17.2
I2CxCON and I2CxSTAT are control and status
registers, respectively. The I2CxCON register is
readable and writable. The lower six bits of I2CxSTAT
are read-only. The remaining bits of the I2CSTAT are
read/write:
• I2CxRSR is the shift register used for shifting data
• I2CxRCV is the receive buffer and the register to
• I2CxTRN is the transmit register to which bytes
• The I2CxADD register holds the slave address.
• A status bit, ADD10, indicates 10-Bit Address
• The I2CxBRG acts as the Baud Rate Generator
In receive operations, I2CxRSR and I2CxRCV together
form a double-buffered receiver. When I2CxRSR
receives a complete byte, it is transferred to I2CxRCV,
and an interrupt pulse is generated.
internal to the module and the user application
has no access to it.
which data bytes are written, or from which data
bytes are read.
are written during a transmit operation.
mode.
(BRG) reload value.
I
2
C Registers
DS70318D-page 223