PIC24HJ64GP506A-I/PT Microchip Technology, PIC24HJ64GP506A-I/PT Datasheet - Page 24

• Manufacturer Part Number: PIC24HJ64GP506A-I/PT
• Description: IC PIC MCU FLASH 64KB 64-TQFP
• Manufacturer: Microchip Technology
• Series: PIC® 24Hr

Specifications of PIC24HJ64GP506A-I/PT

• Core Size: 16-Bit
• Program Memory Size: 64KB (22K x 24)
• Core Processor: PIC
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 18x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TFQFP
• Controller Family/series: PIC24
• No. Of I/o's: 53
• Ram Memory Size: 8KB
• Cpu Speed: 40MHz
• No. Of Timers: 9
• Interface: CAN, I2C, SPI, UART
• Embedded Interface Type: CAN, I2C, SPI, UART
• Rohs Compliant: Yes
• Processor Series: PIC24HJ
• Core: PIC
• Data Bus Width: 16 bit
• Data Ram Size: 8192 B
• Interface Type: SPI, I2C, UART
• Maximum Clock Frequency: 7.37 MHz
• Number Of Timers: 13
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 125 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 16 bit, 8 Channel
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 876-1004 - PIC24 BREAKOUT BOARD
• Eeprom Size: -
• Lead Free Status / Rohs Status: Details

FIGURE 4-2:
4.2
The programming executive command set is shown in
Table
length, time out and description for each command.
Functional details on each command are provided in
the command descriptions
Descriptions”).
4.2.1
All programming executive commands have a general
format consisting of a 16-bit header and any required
data for the command (see
header consists of a 4-bit opcode field, which is used to
identify the command, followed by a 12-bit command
length field.
FIGURE 4-3:
The command opcode must match one of those in the
command set. Any command that is received which
does not match the list in
response (see
The command length is represented in 16-bit words
since the SPI operates in 16-bit mode. The
programming executive uses the command length field
to determine the number of words to read from the SPI
port. If the value of this field is incorrect, the command
will not be properly received by the programming
executive.
DS70152H-page 24
15
Opcode
4-1. This table contains the opcode, mnemonic,
Note 1:
Command Data First Word (if required)
Command Data Last Word (if required)
PGCx
PGDx
Programming Executive
Commands
12 11
COMMAND FORMAT
Section 4.3.1.1 “Opcode
A delay of 25 ms is required between commands.
MSB X X X LSB
1
Last Command Word
PGCx = Input
PGDx = Input
2
Host Transmits
PROGRAMMING EXECUTIVE – PROGRAMMER COMMUNICATION PROTOCOL
COMMAND FORMAT
Table 4-1
15 16
•
•
(Section 4.2.4 “Command
Length
Figure
P8
will return a “NACK”
4-3). The 16-bit
Field”).
Programming Executive
PGCx = Input (Idle)
PGDx = Output
P9a
Processes Command
1
0
P9b
0
4.2.2
When 24-bit instruction words are transferred across
the 16-bit SPI interface, they are packed to conserve
space using the format illustrated in
format minimizes traffic over the SPI and provides the
programming executive with data that is properly
aligned for performing table write operations.
FIGURE 4-4:
4.2.3
The
unsupported commands. Additionally, due to the
memory constraints of the programming executive, no
checking is performed on the data contained in the
programmer command. It is the responsibility of the
programmer to command the programming executive
with valid command arguments or the programming
operation may fail. Additional information on error
handling is provided in
Field”.
15
LSWx: Least Significant 16 bits of instruction word
MSBx: Most Significant Byte of instruction word
Note:
programming
1
MSB X X X LSB
MSB2
PACKED DATA FORMAT
When the number of instruction words
transferred is odd, MSB2 is zero and
LSW2 cannot be transmitted.
PROGRAMMING EXECUTIVE
ERROR HANDLING
2
Host Clocks Out Response
15 16
PGCx = Input
PGDx = Output
PACKED INSTRUCTION
WORD FORMAT
executive
© 2010 Microchip Technology Inc.
LSW1
LSW2
8 7
Section 4.3.1.3 “QE_Code
1
MSB X X X LSB
2
will
MSB1
15 16
Figure
“NACK”
4-4. This
0
all