DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 118

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128GP206A-I/MR

Manufacturer Part Number
DSPIC33FJ128GP206A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP206A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 7-17:
DS70593B-page 118
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15
bit 14-12
bit 11
bit 10-8
bit 7
bit 6-4
bit 3
bit 2-0
U-0
U-0
Unimplemented: Read as ‘0’
U1RXIP<2:0>: UART1 Receiver Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI1IP<2:0>: SPI1 Event Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
SPI1EIP<2:0>: SPI1 Error Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
Unimplemented: Read as ‘0’
T3IP<2:0>: Timer3 Interrupt Priority bits
111 = Interrupt is priority 7 (highest priority interrupt)
001 = Interrupt is priority 1
000 = Interrupt source is disabled
R/W-1
R/W-1
IPC2: INTERRUPT PRIORITY CONTROL REGISTER 2
SPI1EIP<2:0>
U1RXIP<2:0>
W = Writable bit
‘1’ = Bit is set
R/W-0
R/W-0
R/W-0
R/W-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
U-0
U-0
R/W-1
R/W-1
 2009 Microchip Technology Inc.
SPI1IP<2:0>
x = Bit is unknown
T3IP<2:0>
R/W-0
R/W-0
R/W-0
R/W-0
bit 8
bit 0

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