DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 230

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128GP206A-I/MR

Manufacturer Part Number
DSPIC33FJ128GP206A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP206A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 20-2:
DS70593B-page 230
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-12
bit 11-10
bit 9
bit 8-5
bit 4
bit 3-0
R/W-0
U-0
COFSG<2:0>
Unimplemented: Read as ‘0’
BLEN<1:0>: Buffer Length Control bits
11 = Four data words will be buffered between interrupts
10 = Three data words will be buffered between interrupts
01 = Two data words will be buffered between interrupts
00 = One data word will be buffered between interrupts
Unimplemented: Read as ‘0’
COFSG<3:0>: Frame Sync Generator Control bits
1111 = Data frame has 16 words
0010 = Data frame has 3 words
0001 = Data frame has 2 words
0000 = Data frame has 1 word
Unimplemented: Read as ‘0’
WS<3:0>: DCI Data Word Size bits
1111 = Data word size is 16 bits
0100 = Data word size is 5 bits
0011 = Data word size is 4 bits
0010 = Invalid Selection. Do not use. Unexpected results may occur
0001 = Invalid Selection. Do not use. Unexpected results may occur
0000 = Invalid Selection. Do not use. Unexpected results may occur
R/W-0
U-0
DCICON2: DCI CONTROL REGISTER 2
W = Writable bit
‘1’ = Bit is set
R/W-0
U-0
U-0
U-0
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
R/W-0
R/W-0
BLEN<1:0>
R/W-0
R/W-0
WS<3:0>
 2009 Microchip Technology Inc.
x = Bit is unknown
R/W-0
U-0
COFSG3
R/W-0
R/W-0
bit 8
bit 0

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