DSPIC33FJ128GP206A-I/MR Microchip Technology, DSPIC33FJ128GP206A-I/MR Datasheet - Page 87

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128GP206A-I/MR

Manufacturer Part Number
DSPIC33FJ128GP206A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP206A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 18x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
REGISTER 6-1:
 2009 Microchip Technology Inc.
bit 0
Note 1: All of the Reset status bits may be set or cleared in software. Setting one of these bits in software does not
2: If the FWDTEN Configuration bit is ‘1’ (unprogrammed), the WDT is always enabled, regardless of the
3: For dsPIC33FJ256GPX06A/X08A/X10A devices, this bit is unimplemented and reads back programmed
cause a device Reset.
SWDTEN bit setting.
value.
POR: Power-on Reset Flag bit
1 = A Power-on Reset has occurred
0 = A Power-on Reset has not occurred
RCON: RESET CONTROL REGISTER
dsPIC33FJXXXGPX06A/X08A/X10A
Preliminary
(1)
(CONTINUED)
DS70593B-page 87

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