DSPIC30F4011-30I/PT Microchip Technology, DSPIC30F4011-30I/PT Datasheet - Page 160

IC DSPIC MCU/DSP 48K 44TQFP

DSPIC30F4011-30I/PT

Manufacturer Part Number
DSPIC30F4011-30I/PT
Description
IC DSPIC MCU/DSP 48K 44TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 30Fr

Specifications of DSPIC30F4011-30I/PT

Program Memory Type
FLASH
Program Memory Size
48KB (16K x 24)
Package / Case
44-TQFP, 44-VQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
30 MIPs
Connectivity
CAN, I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
30
Eeprom Size
1K x 8
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
2.5 V ~ 5.5 V
Data Converters
A/D 9x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Data Bus Width
16 bit
Processor Series
DSPIC30F
Core
dsPIC
Operating Supply Voltage
2.5 V to 5.5 V
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Data Rom Size
1024 B
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, ICE4000, DM240002, DM300018, DM330011
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
XLT44PT3 - SOCKET TRAN ICE 44MQFP/TQFPAC30F006 - MODULE SKT FOR DSPIC30F 44TQFPAC164305 - MODULE SKT FOR PM3 44TQFPDV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
DSPIC30F401130IPT

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dsPIC30F4011/4012
Table 21-5
Register. Since the control bits within the RCON regis-
ter are R/W, the information in the table implies that all
the bits are negated prior to the action specified in the
condition column.
TABLE 21-5:
Table 21-6
conditions for the RCON register. In this case, it is not
assumed that the user has set/cleared specific bits
prior to action specified in the condition column.
TABLE 21-6:
DS70135G-page 160
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Trap
Note 1:
Power-on Reset
Brown-out Reset
MCLR Reset during normal
operation
Software Reset during
normal operation
MCLR Reset during Sleep
MCLR Reset during Idle
WDT Time-out Reset
WDT Wake-up
Interrupt Wake-up from
Sleep
Clock Failure Trap
Trap Reset
Illegal Operation Reset
Legend: u = unchanged
Note 1:
Condition
Condition
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
When the wake-up is due to an enabled interrupt, the PC is loaded with the corresponding interrupt vector.
lists the Reset conditions for the RCON
lists a second example of the bit
INITIALIZATION CONDITION FOR RCON REGISTER, CASE 1
INITIALIZATION CONDITION FOR RCON REGISTER, CASE 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Program
PC + 2
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000000
0x000004
0x000000
0x000000
Counter
Program
PC + 2
Counter
PC + 2
PC + 2
(1)
(1)
TRAPR IOPUWR EXTR SWR WDTO IDLE SLEEP POR BOR
TRAPR IOPUWR EXTR SWR WDTO IDLE SLEEP POR BOR
0
0
0
0
0
0
0
0
0
0
1
0
0
u
u
u
u
u
u
u
u
u
1
u
0
0
0
0
0
0
0
0
0
0
0
1
0
u
u
u
u
u
u
u
u
u
u
1
0
u
1
0
1
1
0
u
u
u
u
u
0
0
1
0
1
1
0
0
0
0
0
0
0
0
0
1
0
0
0
0
0
0
0
0
0
u
0
1
u
u
0
u
u
u
u
u
0
0
0
0
0
0
1
1
0
0
0
0
0
u
0
0
0
0
1
1
u
u
u
u
© 2010 Microchip Technology Inc.
0
0
0
0
0
1
0
0
0
0
0
0
0
u
0
0
0
1
0
u
u
u
u
u
0
0
0
0
1
0
0
1
1
0
0
0
0
u
0
0
1
0
0
1
1
u
u
u
1
0
0
0
0
0
0
0
0
0
0
0
1
0
u
u
u
u
u
u
u
u
u
u
1
1
0
0
0
0
0
0
0
0
0
0
1
1
u
u
u
u
u
u
u
u
u
u

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