DSPIC33FJ128MC506A-I/MR Microchip Technology, DSPIC33FJ128MC506A-I/MR Datasheet - Page 142

IC DSPIC MCU/DSP 128K 64-QFN

DSPIC33FJ128MC506A-I/MR

Manufacturer Part Number
DSPIC33FJ128MC506A-I/MR
Description
IC DSPIC MCU/DSP 128K 64-QFN
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128MC506A-I/MR

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
53
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 16x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-VFQFN, Exposed Pad
Product
DSCs
Processor Series
DSPIC33F
Core
dsPIC
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJXXXMCX06A/X08A/X10A
REGISTER 8-7:
DS70594B-page 142
bit 3
bit 2
bit 1
bit 0
XWCOL3: Channel 3 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL2: Channel 2 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL1: Channel 1 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
XWCOL0: Channel 0 DMA RAM Write Collision Flag bit
1 = Write collision detected
0 = No write collision detected
DMACS0: DMA CONTROLLER STATUS REGISTER 0 (CONTINUED)
Preliminary
 2009 Microchip Technology Inc.

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