DSPIC33FJ128MC506A-I/MR Microchip Technology, DSPIC33FJ128MC506A-I/MR Datasheet - Page 209

• Manufacturer Part Number: DSPIC33FJ128MC506A-I/MR
• Description: IC DSPIC MCU/DSP 128K 64-QFN
• Manufacturer: Microchip Technology
• Series: dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC506A-I/MR

• Core Processor: dsPIC
• Core Size: 16-Bit
• Speed: 40 MIPs
• Connectivity: CAN, I²C, IrDA, LIN, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
• Number Of I /o: 53
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Data Converters: A/D 16x10b/12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-VFQFN, Exposed Pad
• Product: DSCs
• Processor Series: DSPIC33F
• Core: dsPIC
• 3rd Party Development Tools: 52713-733, 52714-737, 53276-922, EWDSPIC
• Development Tools By Supplier: PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

REGISTER 19-3:
 2009 Microchip Technology Inc.
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-10
bit 9-0
AMSK7
R/W-0
U-0
—
Unimplemented: Read as ‘0’
AMSKx: Mask for Address bit x Select bits
1 = Enable masking for bit x of incoming message address; bit match not required in this position
0 = Disable masking for bit x; bit match required in this position
AMSK6
R/W-0
U-0
—
I2CxMSK: I2Cx SLAVE MODE ADDRESS MASK REGISTER
dsPIC33FJXXXMCX06A/X08A/X10A
W = Writable bit
‘1’ = Bit is set
AMSK5
R/W-0
U-0
—
AMSK4
R/W-0
U-0
—
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
AMSK3
R/W-0
U-0
—
AMSK2
R/W-0
U-0
—
x = Bit is unknown
AMSK9
AMSK1
R/W-0
R/W-0
DS70594B-page 209
AMSK8
AMSK0
R/W-0
R/W-0
bit 8
bit 0