DSPIC33FJ128GP310A-I/PT Microchip Technology, DSPIC33FJ128GP310A-I/PT Datasheet - Page 114

IC DSPIC MCU/DSP 128K 100-TQFP

DSPIC33FJ128GP310A-I/PT

Manufacturer Part Number
DSPIC33FJ128GP310A-I/PT
Description
IC DSPIC MCU/DSP 128K 100-TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr
Datasheet

Specifications of DSPIC33FJ128GP310A-I/PT

Program Memory Type
FLASH
Program Memory Size
128KB (128K x 8)
Package / Case
100-TFQFP
Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
I²C, IrDA, LIN, SPI, UART/USART
Peripherals
AC'97, Brown-out Detect/Reset, DMA, I²S, POR, PWM, WDT
Number Of I /o
85
Ram Size
16K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 32x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Product
DSCs
Data Bus Width
16 bit
Processor Series
DSPIC33F
Core
dsPIC
Maximum Clock Frequency
40 MHz
Number Of Programmable I/os
85
Data Ram Size
16 KB
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
3rd Party Development Tools
52713-733, 52714-737, 53276-922, EWDSPIC
Development Tools By Supplier
PG164130, DV164035, DV244005, DV164005, PG164120, DM240001, DV164033
Minimum Operating Temperature
- 40 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARD
Eeprom Size
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
dsPIC33FJXXXGPX06A/X08A/X10A
REGISTER 7-13:
DS70593B-page 114
bit 15
bit 7
Legend:
R = Readable bit
-n = Value at POR
bit 15-14
bit 13
bit 12
bit 11
bit 10-9
bit 8
bit 7
bit 6
bit 5
bit 4
bit 3
bit 2
bit 1
bit 0
C2RXIE
R/W-0
U-0
Unimplemented: Read as ‘0’
DMA5IE: DMA Channel 5 Data Transfer Complete Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIIE: DCI Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
DCIEIE: DCI Error Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
Unimplemented: Read as ‘0’
C2IE: ECAN2 Event Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
C2RXIE: ECAN2 Receive Data Ready Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE: External Interrupt 4 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT3IE: External Interrupt 3 Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T9IE: Timer9 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T8IE: Timer8 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
MI2C2IE: I2C2 Master Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
SI2C2IE: I2C2 Slave Events Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
T7IE: Timer7 Interrupt Enable bit
1 = Interrupt request enabled
0 = Interrupt request not enabled
INT4IE
R/W-0
U-0
IEC3: INTERRUPT ENABLE CONTROL REGISTER 3
W = Writable bit
‘1’ = Bit is set
DMA5IE
INT3IE
R/W-0
R/W-0
R/W-0
R/W-0
DCIIE
T9IE
Preliminary
U = Unimplemented bit, read as ‘0’
‘0’ = Bit is cleared
DCIEIE
R/W-0
R/W-0
T8IE
MI2C2IE
R/W-0
U-0
 2009 Microchip Technology Inc.
x = Bit is unknown
SI2C2IE
R/W-0
U-0
R/W-0
R/W-0
C2IE
T7IE
bit 8
bit 0

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