DSPIC33FJ128MC510-I/PT Microchip Technology, DSPIC33FJ128MC510-I/PT Datasheet - Page 37

IC DSPIC MCU/DSP 128K 100TQFP

DSPIC33FJ128MC510-I/PT

Manufacturer Part Number
DSPIC33FJ128MC510-I/PT
Description
IC DSPIC MCU/DSP 128K 100TQFP
Manufacturer
Microchip Technology
Series
dsPIC™ 33Fr

Specifications of DSPIC33FJ128MC510-I/PT

Core Processor
dsPIC
Core Size
16-Bit
Speed
40 MIPs
Connectivity
CAN, I²C, IrDA, LIN, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, DMA, Motor Control PWM, QEI, POR, PWM, WDT
Number Of I /o
85
Program Memory Size
128KB (128K x 8)
Program Memory Type
FLASH
Ram Size
8K x 8
Voltage - Supply (vcc/vdd)
3 V ~ 3.6 V
Data Converters
A/D 24x10b/12b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
100-TFQFP
Core Frequency
40MHz
Core Supply Voltage
2.75V
Embedded Interface Type
CAN, I2C, SPI, UART
No. Of I/o's
85
Flash Memory Size
128KB
Supply Voltage Range
3V To 3.6V
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
876-1001 - DSPIC33 BREAKOUT BOARDAC164333 - MODULE SKT FOR PM3 100QFPMA330013 - MODULE PLUG-IN DSPIC33 100TQFPDV164033 - KIT START EXPLORER 16 MPLAB ICD2DM240001 - BOARD DEMO PIC24/DSPIC33/PIC32DV164005 - KIT ICD2 SIMPLE SUIT W/USB CABLE
Eeprom Size
-
Lead Free Status / RoHS Status
Lead free / RoHS Compliant, Lead free / RoHS Compliant

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
DSPIC33FJ128MC510-I/PT
Manufacturer:
Microchip Technology
Quantity:
10 000
TABLE 9-4:
© 2005 Microchip Technology Inc.
ADD
ADD
ADD
ADD
ADDC
ADDC
ADDC
ADDC
DAW.B
DEC
DEC
DEC2
DEC2
DIV.S
DIV.SD
DIV.U
DIV.UD
DIVF
INC
INC
INC2
INC2
MUL
MUL.SS
MUL.SU
MUL.SU
MUL.US
MUL.UU
MUL.UU
SE
SUB
SUB
SUB
SUB
SUBB
SUBB
SUBB
SUBB
SUBBR
SUBBR
SUBBR
SUBR
SUBR
SUBR
ZE
* Divide instructions are interruptible on a cycle-by-cycle basis. Also, divide instructions must be accompanied by a
Assembly Syntax
REPEAT instruction, which adds 1 extra cycle.
f {,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f {,WREG}
#lit10,Wn
Wb,#lit5,Wd
Wb,Ws,Wd
Wn
f {,WREG}
Ws,Wd
f {,WREG}
Ws,Wd
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
Wm,Wn
f {,WREG}
Ws,Wd
f {,WREG}
Ws,Wd
f
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,Ws,Wnd
Wb,Ws,Wnd
Wb,#lit5,Wnd
Wb,Ws,Wnd
Ws,Wnd
f {,WREG}
#lit10, Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f {,WREG}
#lit10, Wn
Wb,#lit5,Wd
Wb,Ws,Wd
f {,WREG}
Wb,#lit5,Wd
Wb,Ws,Wd
f {,WREG}
Wb,#lit5,Wd
Wb,Ws,Wd
Ws,Wnd
MATH INSTRUCTIONS
Destination = f + WREG
Wn = lit10 + Wn
Wd = Wb + lit5
Wd = Wb + Ws
Destination = f + WREG + (C)
Wn = lit10 + Wn + (C)
Wd = Wb + lit5 + (C)
Wd = Wb + Ws + (C)
Wn = decimal adjust Wn
Destination = f – 1
Wd = Ws – 1
Destination = f – 2
Wd = Ws – 2
Signed 16/16-bit integer divide*
Signed 32/16-bit integer divide*
Unsigned 16/16-bit integer divide*
Unsigned 32/16-bit integer divide*
Signed 16/16-bit fractional divide*
Destination = f + 1
Wd = Ws + 1
Destination = f + 2
Wd = Ws + 2
W3:W2 = f * WREG
{Wnd + 1,Wnd} = sign(Wb) * sign(Ws)
{Wnd + 1,Wnd} = sign(Wb) * unsign(lit5)
{Wnd + 1,Wnd} = sign(Wb) * unsign(Ws)
{Wnd + 1,Wnd} = unsign(Wb) * sign(Ws)
{Wnd + 1,Wnd} = unsign(Wb) * unsign(lit5)
{Wnd + 1,Wnd} = unsign(Wb) * unsign(Ws)
Wnd = sign-extended Ws
Destination = f – WREG
Wn = Wn – lit10
Wd = Wb – lit5
Wd = Wb – Ws
Destination = f – WREG – (C)
Wn = Wn – lit10 – (C)
Wd = Wb – lit5 – (C)
Wd = Wb – Ws – (C)
Destination = WREG – f – (C)
Wd = lit5 – Wb – (C)
Wd = Ws – Wb – (C)
Destination = WREG – f
Wd = lit5 – Wb
Wd = Ws – Wb
Wnd = zero-extended Ws
Preliminary
Description
dsPIC33F
Words
DS70155C-page 35
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