PIC16LF877A-I/ML Microchip Technology, PIC16LF877A-I/ML Datasheet - Page 51
PIC16LF877A-I/ML
Manufacturer Part Number
PIC16LF877A-I/ML
Description
IC MCU FLASH 8KX14 A/D 44QFN
Manufacturer
Microchip Technology
Series
PIC® 16Fr
Specifications of PIC16LF877A-I/ML
Core Size
8-Bit
Program Memory Size
14KB (8K x 14)
Core Processor
PIC
Speed
10MHz
Connectivity
I²C, SPI, UART/USART
Peripherals
Brown-out Detect/Reset, POR, PWM, WDT
Number Of I /o
33
Program Memory Type
FLASH
Eeprom Size
256 x 8
Ram Size
368 x 8
Voltage - Supply (vcc/vdd)
2 V ~ 5.5 V
Data Converters
A/D 8x10b
Oscillator Type
External
Operating Temperature
-40°C ~ 85°C
Package / Case
44-QFN
Controller Family/series
PIC16LF
No. Of I/o's
33
Eeprom Memory Size
256Byte
Ram Memory Size
368Byte
Cpu Speed
20MHz
No. Of Timers
3
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
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4.5
PORTE has three pins (RE0/RD/AN5, RE1/WR/AN6
and RE2/CS/AN7) which are individually configurable
as inputs or outputs. These pins have Schmitt Trigger
input buffers.
The PORTE pins become the I/O control inputs for the
microprocessor port when bit PSPMODE (TRISE<4>) is
set. In this mode, the user must make certain that the
TRISE<2:0> bits are set and that the pins are configured
as digital inputs. Also, ensure that ADCON1 is config-
ured for digital I/O. In this mode, the input buffers are
TTL.
Register 4-1 shows the TRISE register which also
controls the Parallel Slave Port operation.
PORTE pins are multiplexed with analog inputs. When
selected for analog input, these pins will read as ‘0’s.
TRISE controls the direction of the RE pins, even when
they are being used as analog inputs. The user must
make sure to keep the pins configured as inputs when
using them as analog inputs.
TABLE 4-9:
2003 Microchip Technology Inc.
RE0/RD/AN5
RE1/WR/AN6
RE2/CS/AN7
Legend: ST = Schmitt Trigger input, TTL = TTL input
Note 1:
Note:
Note:
Name
PORTE and TRISE Register
Input buffers are Schmitt Triggers when in I/O mode and TTL buffers when in Parallel Slave Port mode.
PORTE and TRISE are not implemented
on the 28-pin devices.
On a Power-on Reset, these pins are
configured as analog inputs and read as ‘0’.
Bit#
bit 0
bit 1
bit 2
PORTE FUNCTIONS
Buffer Type
ST/TTL
ST/TTL
ST/TTL
(1)
(1)
(1)
I/O port pin or read control input in Parallel Slave Port mode or analog input:
RD
1 = Idle
0 = Read operation. Contents of PORTD register are output to PORTD
I/O port pin or write control input in Parallel Slave Port mode or analog input:
WR
1 = Idle
0 = Write operation. Value of PORTD I/O pins is latched into PORTD
I/O port pin or chip select control input in Parallel Slave Port mode or analog input:
CS
1 = Device is not selected
0 = Device is selected
register (if chip selected).
I/O pins (if chip selected).
FIGURE 4-9:
Note 1: I/O pins have protection diodes to V
Data
Bus
WR
Port
WR
TRIS
RD
TRIS
RD Port
Function
TRIS Latch
Data Latch
D
D
CK
CK
Q
Q
PIC16F87XA
PORTE BLOCK DIAGRAM
(IN I/O PORT MODE)
Q
EN
EN
Schmitt
Trigger
Input
Buffer
D
DS39582B-page 49
DD
and V
I/O pin
SS
.
(1)
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