AT89C51ED2-RDTUM Atmel, AT89C51ED2-RDTUM Datasheet - Page 16

• Manufacturer Part Number: AT89C51ED2-RDTUM
• Description: IC 8051 MCU FLASH 64K 64VQFP
• Manufacturer: Atmel
• Series: 89Cr

Specifications of AT89C51ED2-RDTUM

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 60MHz
• Connectivity: SPI, UART/USART
• Peripherals: POR, PWM, WDT
• Number Of I /o: 50
• Program Memory Size: 64KB (64K x 8)
• Program Memory Type: FLASH
• Eeprom Size: 2K x 8
• Ram Size: 2K x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: External
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 64-TQFP, 64-VQFP
• Processor Series: AT89x
• Core: 8051
• Data Bus Width: 8 bit
• Data Ram Size: 2 KB
• Interface Type: UART, SPI
• Maximum Clock Frequency: 60 MHz
• Number Of Programmable I/os: 50
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: - 40 C
• Cpu Family: AT89
• Device Core: 8051
• Device Core Size: 8b
• Frequency (max): 40MHz
• Total Internal Ram Size: 2KB
• # I/os (max): 50
• Number Of Timers - General Purpose: 3
• Operating Supply Voltage (typ): 3.3/5V
• Operating Supply Voltage (max): 5.5V
• Operating Supply Voltage (min): 2.7V
• Instruction Set Architecture: CISC
• Operating Temp Range: -40C to 85C
• Operating Temperature Classification: Industrial
• Mounting: Surface Mount
• Pin Count: 64
• Package Type: VQFP
• For Use With: AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Data Converters: -
• Lead Free Status / Rohs Status: Details

6.2
Figure 6-1.
6.2.1
16
Xtal2
Xtal1
Functional Block Diagram
AT89C51RD2/ED2
Prescaler Divider
Functional Oscillator Block Diagram
Osc
F
F
In X2 Mode, for CKRL<>0xFF:
In X1 Mode, for CKRL<>0xFF then:
F
F
OSC
CLK CPU
• A hardware RESET puts the prescaler divider in the following state:
• Any value between FFh down to 00h can be written by software into CKRL register in order to
CPU
CPU
divide frequency of the selected oscillator:
• CKRL = FFh: F
•
•
=
=
:2
Reset
F
F
F
F
CKRL = 00h: minimum frequency
CKRL = FFh: maximum frequency
F
F
CLK CPU
CLK CPU
CLK CPU
CLK CPU
and F
CLKPERIPH
CLKPERIPH
CKCON0
CKRL
CLK PERIPH
X2
0
1
= F
= F
= F
= F
CLK PERIPH
CLK PERIPH
CLK PERIPH
CLK PERIPH
=
=
CLK CPU
---------------------------------------------- -
2
---------------------------------------------- -
4
Prescaler-Divider
×
×
(
(
255 CKRL
255 CKRL
F
F
8-bit
= F
= F
OSC
OSC
= F
= F
= F
–
–
Reload
OSC
OSC
OSC
OSC
CLK PERIPH
/1020 (Standard Mode)
/510 (X2 Mode)
/2 (Standard Mode)
(X2 Mode)
)
)
CKRL = 0xFF?
= F
OSC
1
0
/2 (Standard C51 feature)
Idle
CLK
Periph
CLK
CPU
Peripheral Clock
CPU Clock
4235K–8051–05/08