AT32AP7001-ALUT Atmel, AT32AP7001-ALUT Datasheet - Page 614

• Manufacturer Part Number: AT32AP7001-ALUT
• Description: IC MCU 32BIT AVR32 208-LQFP
• Manufacturer: Atmel
• Series: AVR®32 AP7r

Specifications of AT32AP7001-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 150MHz
• Connectivity: EBI/EMI, I²C, MMC, PS2, SPI, SSC, UART/USART, USB
• Peripherals: AC'97, DMA, I²C, POR, PWM, WDT
• Number Of I /o: 90
• Program Memory Type: ROMless
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: D/A 2x16b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 208-LQFP
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: EBI, ISI, MCI, PS2, SPI, TWI, USB
• Maximum Clock Frequency: 150 MHz
• Number Of Programmable I/os: 90
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Minimum Operating Temperature: - 40 C
• On-chip Dac: 16 bit, 1 Channel
• Package: 208PQFP
• Device Core: AVR32
• Family Name: AT32
• Maximum Speed: 150 MHz
• Operating Supply Voltage: 1.8 V
• For Use With: ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMRATNGW100 - KIT AVR32 NETWORK GATEWAYATSTK1000 - KIT STARTER FOR AVR32AP7000
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Program Memory Size: -
• Lead Free Status / Rohs Status: Details

Figure 32-7. Data IN Transfer for Endpoint with One Bank
Figure 32-8. Data IN Transfer for Endpoint with Two Banks
32015G–AVR32–09/09
USB Bus
Packets
TX_PK_RDY
Flag
(UDPHS_EPTSTAx)
TX_COMPLT Flag
(UDPHS_EPTSTAx)
FIFO
Content
USB Bus
Packets
Virtual TX_PK_RDY
bank 1
(UDPHS_EPTSTAx)
TX_COMPLT
Flag
(UDPHS_EPTSTAx)
FIFO
(DPR)
Bank 0
FIFO
(DPR)
Bank1
Virtual TX_PK_RDY
bank 0
(UDPHS_EPTSTAx)
Written by
Microcontroller
Set by Firmware,
Data Payload Written
in FIFO Bank 0
Microcontroller
Load Data IN Bank 0
Token IN
Set by firmware
Prevous Data IN TX
Token IN
Data IN 1
Data IN 1
Cleared by Hardware
switch to next bank
Microcontroller Load Data IN Bank 1
UDPHS Device Send Bank 0
Cleared by hardware
Set by hardware
Written by
Microcontroller
Read by USB Device
Data IN
ACK
Set by Hardware
DPR access by firmware
Microcontroller Loads Data in FIFO
Token IN
Load in progress
Interrupt Pending
Cleared by Hardware
Data Payload Fully Transmitted
ACK
NAK
Interrupt Pending
Set by the firmware
Interrupt Cleared by Firmware
Token IN
Token IN
Cleared by firmware
Microcontroller Load Data IN Bank 0
UDPHS Device Send Bank 1
Written by
Microcontroller
Set by Firmware,
Data Payload Written in FIFO Bank 1
Data is Sent on USB Bus
DPR access by hardware
Read by UDPHS Device
Data IN 2
Payload in FIFO
Data IN
Data IN 2
Set by Hardware
AT32AP7001
Cleared by hardware
Cleared by firmware
Interrupt Pending
ACK
ACK
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