AT32UC3A0128-ALUT Atmel, AT32UC3A0128-ALUT Datasheet - Page 618

• Manufacturer Part Number: AT32UC3A0128-ALUT
• Description: IC MCU AVR32 128KB FLASH 144LQFP
• Manufacturer: Atmel
• Series: AVR®32 UC3r

Specifications of AT32UC3A0128-ALUT

• Core Processor: AVR
• Core Size: 32-Bit
• Speed: 66MHz
• Connectivity: EBI/EMI, Ethernet, I²C, SPI, SSC, UART/USART, USB OTG
• Peripherals: Brown-out Detect/Reset, POR, PWM, WDT
• Number Of I /o: 109
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 1.65 V ~ 1.95 V
• Data Converters: A/D 8x10b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 144-LQFP
• Processor Series: AT32UC3x
• Core: AVR32
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: 2-Wire, RS-485, SPI, USART
• Maximum Clock Frequency: 66 MHz
• Number Of Programmable I/os: 69
• Number Of Timers: 3
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: EWAVR32, EWAVR32-BL, KSK-EVK1100-PL
• Development Tools By Supplier: ATAVRDRAGON, ATSTK500, ATSTK600, ATAVRISP2, ATAVRONEKIT, ATEXTWIFI, ATEVK1100, ATEVK1105
• Minimum Operating Temperature: - 40 C
• Controller Family/series: AT32UC3A
• No. Of I/o's: 109
• Ram Memory Size: 32KB
• Cpu Speed: 66MHz
• No. Of Timers: 1
• Rohs Compliant: Yes
• For Use With: ATEVK1105 - KIT EVAL FOR AT32UC3A0ATAVRONEKIT - KIT AVR/AVR32 DEBUGGER/PROGRMMR770-1008 - ISP 4PORT ATMEL AVR32 MCU SPIATEVK1100 - KIT DEV/EVAL FOR AVR32 AT32UC3A
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant

• OVERFI: Overflow Interrupt Flag
Set by hardware when the current Pipe has received more data than the maximum length of the current Pipe. An interrupt
is triggered if the OVERFIE bit is set. Shall be cleared by software (by setting the OVERFIC bit).
• RXSTALLDI: Received STALLed Interrupt Flag
For all endpoints but isochronous. Set by hardware when a STALL handshake has been received on the current bank of
the Pipe. The Pipe is automatically frozen. This triggers an interrupt if the RXSTALLE bit is set. Shall be cleared to hand-
shake the interrupt (by setting the RXSTALLDIC bit).
• CRCERRI: CRC Error Interrupt Flag
For isochronous endpoint, set by hardware when a CRC error occurs on the current bank of the Pipe. This triggers an inter-
rupt if the TXSTPE bit is set. Shall be cleared to handshake the interrupt (by setting the CRCERRIC bit).
• SHORTPACKETI: Short Packet Interrupt Flag
Set by hardware when a short packet is received by the host controller (packet length inferior to the PSIZE programmed
field). Shall be cleared to handshake the interrupt (by setting the SHORTPACKETIC bit).
• DTSEQ: Data Toggle Sequence
Set by hardware to indicate the data PID of the current bank.
For OUT pipe, this field indicates the data toggle of the next packet that will be sent.
For IN pipe, this field indicates the data toggle of the received packet stored in the current bank.
• NBUSYBK: Number of Busy Banks
Set by hardware to indicate the number of busy bank.
For OUT Pipe, it indicates the number of busy bank(s), filled by the user, ready for OUT transfer. When all banks are busy,
this triggers an PXINT interrupt if UPCONX.NBUSYBKE = 1.
For IN Pipe, it indicates the number of busy bank(s) filled by IN transaction from the Device. When all banks are free, this
triggers an PXINT interrupt if UPCONX.NBUSYBKE = 1..
32058J–AVR32–04/11
0
0
1
1
0
0
1
1
NBUSYBK
DTSEQ
0
1
0
1
0
1
0
1
Data toggle sequence
Data0
Data1
reserved
reserved
Number of busy bank
All banks are free.
1 busy bank
2 busy banks
reserved
AT32UC3A
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