AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 105
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
17.1.1
4173E–USB–09/07
IDE Device Connection
Figure 17-2. IDE Write Waveforms
Notes:
Figure 17-3 and Figure 17-4 show two examples on how to interface up to two IDE devices to
the AT89C5132. In both examples P0 carries IDE low order data bits D7:0, P2 carries IDE high
order data bits D15:8, while RD and WR signals are respectively connected to the IDE nIOR and
nIOW signals. Other IDE control signals are generated by the external address latch outputs in
the first example while they are generated by some port I/Os in the second one. Using an exter-
nal latch will achieve higher transfer rate.
Figure 17-3. IDE Device Connection Example 1
Figure 17-4. IDE Device Connection Example 2
1. WR signal may be stretched using M0 bit in AUXR register.
2. When executing MOVX @Ri instruction, P2 outputs SFR content.
3. When executing MOVX @DPTR instruction, if DPHDIS is set (Page Access Mode), P2 out-
CPU Clock
puts SFR content instead of DPH.
WR
AT89C5132
AT89C5132
ALE
P0
P2
(1)
P0/AD7:0
P2/A15:8
P4.2:0
P4.4:3
P4.5
Px.y
ALE
WR
WR
RD
RD
P2
P0
P2
DPH or P2
DPL or Ri
Latch
(2),(3)
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 0
IDE Device 0
D15:8
D7:0
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
D15-8
D7:0
A2:0
nCS1:0
nRESET
nIOR
nIOW
IDE Device 1
IDE Device 1
AT89C5132
P2
105