AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 148
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
21.1.1
21.1.2
21.1.3
148
AT89C5132
Clock Generator
Channel Selection
Conversion Precision
Figure 21-2. Timing Diagram
The ADC clock is generated by division of the peripheral clock (see details in Section “X2 Fea-
ture”, page 12). The division factor is then given by ADCP4:0 bits in ADCLK register. Figure 21-
3 shows the ADC clock generator and its calculation formula
Figure 21-3. ADC Clock Generator and Symbol Caution:
Note:
The channel on which conversion is performed is selected by the ADCS bit in ADCON register
according to Table 30.
Table 30. ADC Channel Selection
The 10-bit precision conversion is achieved by stopping the CPU core activity during conversion
for limiting the digital noise induced by the core. This mode called the Pseudo-Idle mode
enabled by setting the ADIDL bit in ADCON register
Section "Conversion Launching", page 149), the CPU core is stopped until the end of the con-
1. In all cases, the ADC clock frequency may be higher than the maximum F
2. The ADCD value of 0 is equivalent to an ADCD value of 32.
ADEOC
ADSST
CLOCK
ADEN
reported in the Section “Analog to Digital Converter”, page 201.
PER
CLK
ADCS
T
0
1
÷ 2
SETUP
T
ADCD4:0
ADCLK
ADCLK
ADCclk
=
(3)
-------------------------
2 ADCD
PERclk
⋅
. Thus, when conversion is launched (see
T
ADC Clock
CONV
(1)
.
Channel
AIN1
AIN0
ADC Clock Symbol
CLOCK
ADCLK
ADC
4173E–USB–09/07
parameter
(1),(2)
is