AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 35
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
4173E–USB–09/07
Table 33. Priority Levels
A low-priority interrupt is always interrupted by a higher priority interrupt but not by another inter-
rupt of lower or equal priority. Higher priority interrupts are serviced before lower priority
interrupts. The response to simultaneous occurrence of equal priority interrupts is determined by
an internal hardware polling sequence detailed in Table 34. Thus within each priority level there
is a second priority structure determined by the polling sequence. The interrupt control system is
shown in Figure 10-1.
Table 34. Priority Within Same Level
Interrupt Name
INT0
Timer 0
INT1
Timer 1
Serial Port
Reserved
Audio Interface
MMC Interface
Two-wire Controller
SPI Controller
A-to-D Converter
Keyboard
Reserved
USB
Reserved
IPHxx
0
0
1
1
14 (Lowest Priority)
0 (Highest Priority)
Priority Number
10
11
12
13
IPLxx
1
2
3
4
5
6
7
8
9
0
1
0
1
Interrupt Address Vectors
Priority Level
0 Lowest
1
2
3 Highest
C:0003h
C:000Bh
C:0013h
C:001Bh
C:0023h
C:0033h
C:003Bh
C:0043h
C:004Bh
C:0053h
C:005Bh
C:0063h
C:006Bh
C:0073h
Cleared by Hardware (H)
AT89C5132
Interrupt Request Flag
or by Software (S)
H if edge, S if level
H if edge, S if level
H
H
S
S
S
S
S
S
S
S
-
-
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