AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 70
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
15.1.3
Figure 15-5. UFI Block Diagram
Figure 15-6. USB Typical Transaction Load
15.2
70
USB Interrupt System
AT89C5132
IN Transactions:
OUT Transactions:
Function Interface Unit (UFI)
HOST
HOST
12 MHz DPLL
To/From SIE
C51
UFI
C51
UFI
OUT
IN
The Function Interface Unit provides the interface between the AT89C5132 and the SIE. It man-
ages transactions at the packet level with minimal intervention from the device firmware, which
reads and writes the endpoint FIFOs.
Figure 15-6 shows typical USB IN and OUT transactions reporting the split in the hardware (UFI)
and software (C51) load.
As shown in Figure 15-7, the USB controller of the AT89C5132 handle sixteen interrupt sources.
These sources are separated in two groups: the endpoints interrupts and the controller inter-
rupts, combined together to appear as single interrupt source for the C51 core. The USB
interrupt is enabled by setting the EUSB bit in IEN1.
NACK
DATA0 (n Bytes)
Endpoint FIFO Write
Endpoint Control
USB side
Transfer
Control
FSM
ACK
IN
C51 interrupt
Asynchronous Information
Endpoint FIFO read (n Bytes)
DATA1
Endpoint 2
Endpoint 1
Endpoint 0
OUT
DATA1
IN
Endpoint Control
UEPCONX
USBADDR
UEPSTAX
UEPDATX
NACK
UEPNUM
UFNUMH
C51 side
USBCON
UEPRST
UBYCTX
UFNUML
USBIEN
UEPIEN
USBINT
UEPINT
DATA1
OUT
ACK
To/From C51 Core
C51 interrupt
DATA1
Endpoint FIFO write
ACK
4173E–USB–09/07