AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 86
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
16.2.5
86
AT89C5132
Data Packet Format
Table 72. R1 Response Format (Normal Response)
Table 73. R2 Response Format (CID and CSD registers)
Table 74. R3 Response Format (OCR Register)
Table 75. R4 Response Format (Fast I/O)
Table 76. R5 Response Format
There are two types of data packets: stream and block. As shown in Figure 16-8, stream data
packets have an indeterminate length while block packets have a fixed length depending on the
block length. Each data packet is preceded by a Start bit: a low level on MCMD line and suc-
ceeded by an End bit: a high level on MCMD line. Due to the fact that there is no predefined end
Bit Position
Width (Bits)
Bit Position
Width (Bits)
Description
Bit Position
Width (Bits)
Description
Description
Bit Position
Width (Bits)
Description
Bit Position
Width (Bits)
Description
Value
Value
Value
Value
Value
Start bit
Start bit
Start bit
Start bit
47
‘0’
47
‘0’
1
47
1
‘0’
47
‘0’
1
1
Start bit
135
‘0’
1
Transmission bit
Transmission
Transmission
Transmission
46
‘0’
46
‘0’
bit
1
1
Transmission bit
46
‘0’
bit
46
‘0’
bit
1
1
134
‘0’
1
Command
Reserved
Command
Command
‘101000’
‘111111’
[45:40]
‘100111’
[45:40]
[45:40]
Index
45:40
Index
Index
6
6
6
6
-
[133:128]
Reserved
‘111111’
6
OCR register
Card Status
Argument
Argument
[39:8]
[39:8]
[39:8]
39:8
32
32
32
32
-
-
-
-
Argument
[127:1]
32
Reserved
‘1111111’
-
CRC7
CRC7
CRC7
[7:1]
[7:1]
[7:1]
7:1
7
7
7
7
-
-
-
4173E–USB–09/07
End bit
End bit
End bit
End bit
End bit
‘1’
0
1
‘1’
‘1’
‘1’
‘1’
0
1
0
1
0
1
0
1