AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 90
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
16.5.2
16.6
90
Data Line Controller
AT89C5132
Command Receiver
Figure 16-13. Command Transmission Flow
The end of the response reception is signalled by the EORI flag in MMINT register. This flag may
generate an MMC interrupt request as detailed in Section "Interrupt", page 96. When this flag is
set, two other flags in MMSTA register: RESPFS and CRC7S give a status on the response
received. RESPFS indicates if the response format is correct or not: the size is the one expected
(48 Bits or 136 Bits) and a valid End bit has been received, and CRC7S indicates if the CRC7
computation is correct or not. These Flags are cleared when a command is sent to the card and
updated when the response has been received.
The user may abort response reading by setting and clearing the CRPTR bit in MMCON0 regis-
ter which resets the read pointer to the receive FIFO.
According to the MMC specification delay between a command and a response (formally N
parameter) cannot exceed 64 MMC clock periods. To avoid any locking of the MMC controller
when card does not send its response (e.g. physically removed from the bus), user must launch
a timeout period to exit from such situation. In case of timeout user may reset the command con-
troller and its internal state machine by setting and clearing the CCR bit in MMCON2 register.
This timeout may be disarmed when receiving the response.
The data line controller is based on a 16-byte FIFO used both by the data transmitter channel
and by the data receiver channel.
Configure Response
Transmission
RESPEN = X
CRCDIS = X
Command
RFMT = X
MMCMD = Argument
Transmit Command
Load Command in
MMCMD = Index
CMDEN = 1
CMDEN = 0
Buffer
4173E–USB–09/07
CR