AT89C5132-ROTUL Atmel, AT89C5132-ROTUL Datasheet - Page 99
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AT89C5132-ROTUL
Manufacturer Part Number
AT89C5132-ROTUL
Description
IC 8051 MCU FLASH 64K USB 80TQFP
Manufacturer
Atmel
Series
AT89C513xr
Specifications of AT89C5132-ROTUL
Core Processor
C52X2
Core Size
8-Bit
Speed
20MHz
Connectivity
IDE/ATAPI, I²C, MMC, PCM, SPI, UART/USART, USB
Peripherals
I²S, POR, WDT
Number Of I /o
44
Program Memory Size
64KB (64K x 8)
Program Memory Type
FLASH
Eeprom Size
4K x 8
Ram Size
2.25K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 3.3 V
Data Converters
A/D 2x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
80-TQFP, 80-VQFP
Cpu Family
89C
Device Core
8051
Device Core Size
8b
Frequency (max)
40MHz
Interface Type
IDE/SPI/UART/USB
Total Internal Ram Size
2.25KB
# I/os (max)
44
Number Of Timers - General Purpose
2
Operating Supply Voltage (typ)
3V
Operating Supply Voltage (max)
3.3V
Operating Supply Voltage (min)
2.7V
On-chip Adc
2-chx10-bit
Instruction Set Architecture
CISC
Operating Temp Range
-40C to 85C
Operating Temperature Classification
Industrial
Mounting
Surface Mount
Pin Count
80
Package Type
TQFP
Package
80TQFP
Family Name
89C
Maximum Speed
40 MHz
Operating Supply Voltage
3 V
Data Bus Width
8 Bit
Number Of Programmable I/os
44
Number Of Timers
2
Maximum Clock Frequency
20 MHz
Data Ram Size
2304 B
Mounting Style
SMD/SMT
A/d Bit Size
10 bit
A/d Channels Available
2
Height
1.45 mm
Length
14.1 mm
Maximum Operating Temperature
+ 85 C
Minimum Operating Temperature
- 40 C
Supply Voltage (max)
3.3 V
Supply Voltage (min)
2.7 V
Width
14.1 mm
For Use With
AT89OCD-01 - USB EMULATOR FOR AT8XC51 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
4173E–USB–09/07
MMCON2 (S:E6h) – MMC Control Register 2
Reset Value = 0000 0000b
Table 81. MMSTA Register
MMSTA (S:DEh Read Only) – MMC Control and Status Register
MMCEN
Number
Number
4 - 3
2 - 1
7 - 6
Bit
Bit
7
7
6
5
0
7
5
-
Mnemonic Description
Mnemonic Description
DATD1:0
MMCEN
FLOWC
CBUSY
DCR
DCR
CCR
Bit
Bit
6
6
-
-
-
MMC Clock Enable Bit
Set to enable the MCLK clocks and activate the MMC controller.
Clear to disable the MMC clocks and freeze the MMC controller.
Data Controller Reset Bit
Set and clear to reset the data line controller in case of transfer abort.
Command Controller Reset Bit
Set and clear to reset the command line controller in case of transfer abort.
Reserved
The values read from these Bits are always 0. Do not set these Bits.
Used to delay the data transmission after a response from 3 MMC clock periods
(all Bits cleared) to 9 MMC clock periods (all Bits set) by step of 2 MMC clock
periods.
MMC Flow Control Bit
Set to enable the flow control during data transfers.
Clear to disable the flow control during data transfers.
Reserved
The values read from these Bits are always 0. Do not set these Bits.
Card Busy Flag
Set by hardware when the card sends a busy state on the data line.
Cleared by hardware when the card no more sends a busy state on the data line.
Data Transmission Delay Bits
CBUSY
CCR
5
5
CRC16S
4
4
-
DATFS
3
3
-
CRC7S
DATD1
2
2
AT89C5132
RESPFS
DATD0
1
1
FLOWC
CFLCK
0
0
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