P87C52SBPN,112 NXP Semiconductors, P87C52SBPN,112 Datasheet - Page 2

IC 80C51 MCU 8K OTP 40-DIP

P87C52SBPN,112

Manufacturer Part Number
P87C52SBPN,112
Description
IC 80C51 MCU 8K OTP 40-DIP
Manufacturer
NXP Semiconductors
Series
87Cr
Datasheet

Specifications of P87C52SBPN,112

Program Memory Type
OTP
Program Memory Size
8KB (8K x 8)
Package / Case
40-DIP (0.600", 15.24mm)
Core Processor
8051
Core Size
8-Bit
Speed
16MHz
Connectivity
EBI/EMI, UART/USART
Peripherals
POR
Number Of I /o
32
Ram Size
256 x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Oscillator Type
Internal
Operating Temperature
0°C ~ 70°C
Processor Series
P87C5x
Core
80C51
Data Bus Width
8 bit
Data Ram Size
256 B
Interface Type
UART
Maximum Clock Frequency
33 MHz
Number Of Programmable I/os
32
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
3rd Party Development Tools
PK51, CA51, A51, ULINK2
Minimum Operating Temperature
0 C
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Data Converters
-
Lead Free Status / Rohs Status
Lead free / RoHS Compliant
Other names
568-1012-5
935253690112
P87C52SBPN
Philips Semiconductors
DESCRIPTION
The Philips 80C51/87C51/80C52/87C52 is a high-performance
static 80C51 design fabricated with Philips high-density CMOS
technology with operation from 2.7 V to 5.5 V.
The 8xC51 and 8xC52 contain a 128
respectively, 32 I/O lines, three 16-bit counter/timers, a six-source,
four-priority level nested interrupt structure, a serial I/O port for
either multi-processor communications, I/O expansion or full duplex
UART, and on-chip oscillator and clock circuits.
In addition, the device is a low power static design which offers a
wide range of operating frequencies down to zero. Two software
selectable modes of power reduction—idle mode and power-down
mode are available. The idle mode freezes the CPU while allowing
the RAM, timers, serial port, and interrupt system to continue
functioning. The power-down mode saves the RAM contents but
freezes the oscillator, causing all other chip functions to be
inoperative. Since the design is static, the clock can be stopped
without loss of user data and then the execution resumed from the
point the clock was stopped.
SELECTION TABLE
For applications requiring more ROM and RAM, see the 8XC54/58
and 8XC51RA+/RB+/RC+/80C51RA+ data sheet.
Note: 80C31/80C32 is specified in separate data sheet.
80C31*/80C51/87C51
0K/4K
80C32*/80C52/87C52
0K/8K/16K/32K
80C51RA+/8XC51RA+/RB+/RC+
0K/8K/16K/32K
8XC51RD+
64K
2000 Aug 07
ROM/EPROM
Memory Size
80C51 8-bit microcontroller family
4 K/8 K OTP/ROM low voltage (2.7 V–5.5 V),
low power, high speed (33 MHz), 128/256 B RAM
(X by 8)
RAM Size
(X by 8)
1024
128
256
512
Programmable
Timer Counter
8 RAM and 256
(PCA)
Yes
Yes
No
No
Watch Dog
Hardware
8 RAM
Timer
Yes
Yes
No
No
2
FEATURES
8051 Central Processing Unit
– 4k
– 8k
– 128
– 256
– Three 16-bit counter/timers
– Boolean processor
– Full static operation
– Low voltage (2.7 V to 5.5 V@ 16 MHz) operation
Memory addressing capability
– 64k ROM and 64k RAM
Power control modes:
– Clock can be stopped and resumed
– Idle mode
– Power-down mode
CMOS and TTL compatible
TWO speed ranges at V
– 0 to 16 MHz
– 0 to 33 MHz
Three package styles
Extended temperature ranges
Dual Data Pointers
Security bits:
– ROM (2 bits)
– OTP/EPROM (3 bits)
Encryption array – 64 bytes
4 level priority interrupt
6 interrupt sources
Four 8-bit I/O ports
Full–duplex enhanced UART
– Framing error detection
– Automatic address recognition
Programmable clock out
Asynchronous port reset
Low EMI (inhibit ALE and slew rate controlled outputs)
Wake-up from Power Down by an external interrupt
8 ROM (80C51)
8 ROM (80C52)
8 RAM (80C51)
8 RAM (80C52)
80C51/87C51/80C52/87C52
CC
= 5 V
Product specification
853–0169 24291

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