P87C54SBAA,512 NXP Semiconductors, P87C54SBAA,512 Datasheet - Page 12

• Manufacturer Part Number: P87C54SBAA,512
• Description: IC 80C51 MCU 16K OTP 44-PLCC
• Manufacturer: NXP Semiconductors
• Series: 87Cr

Specifications of P87C54SBAA,512

• Core Processor: 8051
• Core Size: 8-Bit
• Speed: 16MHz
• Connectivity: EBI/EMI, UART/USART
• Peripherals: POR
• Number Of I /o: 32
• Program Memory Size: 16KB (16K x 8)
• Program Memory Type: OTP
• Ram Size: 256 x 8
• Voltage - Supply (vcc/vdd): 2.7 V ~ 5.5 V
• Oscillator Type: Internal
• Operating Temperature: 0°C ~ 70°C
• Package / Case: 44-PLCC
• Processor Series: P87C5x
• Core: 80C51
• Data Bus Width: 8 bit
• Data Ram Size: 256 B
• Interface Type: UART
• Maximum Clock Frequency: 16 MHz
• Number Of Programmable I/os: 32
• Number Of Timers: 3
• Operating Supply Voltage: 2.7 V to 5.5 V
• Maximum Operating Temperature: + 70 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: PK51, CA51, A51, ULINK2
• Minimum Operating Temperature: 0 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 568-1252-5; 935258650512; P87C54SBAA

*
# SFRs are modified from or added to the 80C51 SFRs.
– Reserved bits.
Philips Semiconductors
Table 2.
OSCILLATOR CHARACTERISTICS
XTAL1 and XTAL2 are the input and output, respectively, of an
inverting amplifier. The pins can be configured for use as an on-chip
oscillator.
To drive the device from an external clock source, XTAL1 should be
driven while XTAL2 is left unconnected. There are no requirements
on the duty cycle of the external clock signal, because the input to
the internal clock circuitry is through a divide-by-two flip-flop.
However, minimum and maximum high and low times specified in
the data sheet must be observed.
2000 Aug 07
PSW*
RACAP2H#
RACAP2L#
SADDR#
SADEN#
SBUF
SCON*
SP
TCON*
T2CON*
T2MOD#
TH0
TH1
TH2#
TL0
TL1
TL2#
TMOD
WDTRST
SYMBOL
80C51 8-bit microcontroller family
8K–64K/256–1K OTP/ROM/ROMless, low voltage (2.7V–5.5V),
low power, high speed (33MHz)
SFRs are bit addressable.
Program Status Word
Timer 2 Capture High
Timer 2 Capture Low
Slave Address
Slave Address Mask
Serial Data Buffer
Serial Control
Stack Pointer
Timer Control
Timer 2 Control
Timer 2 Mode Control
Timer High 0
Timer High 1
Timer High 2
Timer Low 0
Timer Low 1
Timer Low 2
Timer Mode
HDW Watchdog
Timer Reset (RX+ only)
8XC51FA/FB/FC, 8XC51RA+/RB+/RC+/RD+ Special Function Registers (Continued)
DESCRIPTION
ADDRESS
DIRECT
0A6H
CBH
CAH
CDH
CCH
D0H
A9H
B9H
C8H
C9H
8CH
8DH
8AH
8BH
99H
98H
81H
88H
89H
MSB
SM0/FE
GATE
TF1
TF2
CY
D7
CF
9F
8F
–
BIT ADDRESS, SYMBOL, OR ALTERNATIVE PORT FUNCTION
EXF2
SM1
TR1
C/T
AC
CE
D6
9E
8E
–
12
RCLK
SM2
TF0
CD
M1
D5
9D
8D
F0
machine cycles (24 oscillator periods), while the oscillator is running.
–
RESET
A reset is accomplished by holding the RST pin high for at least two
To insure a good power-on reset, the RST pin must be high long
enough to allow the oscillator time to start up (normally a few
milliseconds) plus two machine cycles. At power-on, the voltage on
V
Ports 1, 2, and 3 will asynchronously be driven to their reset
condition when a voltage above V
CC
and RST must come up at the same time for a proper start-up.
TCLK
REN
RS1
TR0
CC
D4
9C
8C
M0
–
EXEN2
8XC51RA+/RB+/RC+/RD+/80C51RA+
GATE
RS0
TB8
IE1
CB
D3
9B
8B
–
RB8
TR2
C/T
OV
IT1
D2
CA
9A
8A
–
8XC51FA/FB/FC/80C51FA
IH1
T2OE
(min.) is applied to RESET.
C/T2
IE0
D1
C9
M1
99
89
TI
–
CP/RL2
LSB
DCEN
Product specification
IT0
M0
D0
C8
98
RI
88
P
8XC54/58
000000x0B
00H
00H
00H
00H
xxxxxxxxB
00H
07H
00H
00H
xxxxxx00B
00H
00H
00H
00H
00H
00H
00H
RESET
VALUE