LPC1764FBD100,551 NXP Semiconductors, LPC1764FBD100,551 Datasheet - Page 17

• Manufacturer Part Number: LPC1764FBD100,551
• Description: IC ARM CORTEX MCU 128K 100-LQFP
• Manufacturer: NXP Semiconductors
• Series: LPC17xxr

Specifications of LPC1764FBD100,551

• Program Memory Type: FLASH
• Program Memory Size: 128KB (128K x 8)
• Package / Case: 100-LQFP
• Core Processor: ARM® Cortex-M3™
• Core Size: 32-Bit
• Speed: 100MHz
• Connectivity: CAN, Ethernet, I²C, IrDA, Microwire, SPI, SSI, UART/USART, USB
• Peripherals: Brown-out Detect/Reset, DMA, Motor Control PWM, POR, PWM, WDT
• Number Of I /o: 70
• Ram Size: 32K x 8
• Voltage - Supply (vcc/vdd): 2.4 V ~ 3.6 V
• Data Converters: A/D 8x12b
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Processor Series: LPC17
• Core: ARM Cortex M3
• Data Bus Width: 32 bit
• Data Ram Size: 32 KB
• Interface Type: CAN, I2C, SPI, UART
• Maximum Clock Frequency: 100 MHz
• Number Of Programmable I/os: 70
• Number Of Timers: 3
• Operating Supply Voltage: 3.3 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• 3rd Party Development Tools: MDK-ARM, RL-ARM, ULINK2, MCB1760, MCB1760U, MCB1760UME, IRD-LPC1768-DEV, KSK-LPC1768-JL
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 12 bit, 8 Channel
• On-chip Dac: 10 bit
• Package: 100LQFP
• Device Core: ARM Cortex M3
• Family Name: LPC1700
• Maximum Speed: 100 MHz
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• For Use With: 622-1005 - USB IN-CIRCUIT PROG ARM7 LPC2K
• Eeprom Size: -
• Lead Free Status / Rohs Status: Lead free / RoHS Compliant
• Other names: 568-4793; 935287919551

NXP Semiconductors
[4]
[5]
[6]
[7]
[8]
[9]
[10] Pad provides special analog functionality.
[11] When the system oscillator is not used, connect XTAL1 and XTAL2 as follows: XTAL1 can be left floating or can be grounded (grounding
[12] When the RTC is not used, connect VBAT to V
LPC1769_68_67_66_65_64_63
Product data sheet
Open-drain 5 V tolerant digital I/O pad, compatible with I
output functionality. When power is switched off, this pin connected to the I
Open-drain configuration applies to all functions on this pin.
Pad provides digital I/O and USB functions. It is designed in accordance with the USB specification, revision 2.0 (Full-speed and
Low-speed mode only). This pad is not 5 V tolerant.
5 V tolerant pad with 5 ns glitch filter providing digital I/O functions with TTL levels and hysteresis.
5 V tolerant pad with TTL levels and hysteresis. Internal pull-up and pull-down resistors disabled.
5 V tolerant pad with TTL levels and hysteresis and internal pull-up resistor.
5 V tolerant pad with 20 ns glitch filter providing digital I/O function with TTL levels and hysteresis.
is preferred to reduce susceptibility to noise). XTAL2 should be left floating.
All information provided in this document is subject to legal disclaimers.
DD(REG)(3V3)
Rev. 6.01 — 11 March 2011
2
C-bus 400 kHz specification. This pad requires an external pull-up to provide
and leave RTCX1 floating.
LPC1769/68/67/66/65/64/63
2
C-bus is floating and does not disturb the I
32-bit ARM Cortex-M3 microcontroller
© NXP B.V. 2011. All rights reserved.
2
C lines.
17 of 79