EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet - Page 599
EP9307-CRZ
Manufacturer Part Number
EP9307-CRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(16 pages)
2.EP9307-CRZ.pdf
(50 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9307-CRZ.pdf
(48 pages)
Specifications of EP9307-CRZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1138
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EP9307-CRZ PDF datasheet
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DS785UM1
17.3.2.1.1 Select Ir Mode
17.3.2.1.2 Select Data Rate
17.3.2.2.1 Initialization
17.3.2.1 General Configuration
17.3.2.2 Transmitting Data
The IrEnable register selects which of the three Ir sub-modules is used to operate the IrDA
interface. Only one of the three may be active at any one time. The reset value for this
register is zero, which disables all three encoder/decoder modules. The bottom two bits of
this register select the encoder/decoder module according to the tabulated values:
SIR does not use the data transfer mechanism described in this section. After selecting SIR
mode, all data transfer operations are made through a UART, as if connection is through a
serial cable without handshake lines. The features described below are implemented for the
MIR and FIR modes.
The data rates for MIR and FIR are as follows:
The principal method of data transfer from memory to the active IrDA encoder (MIR or FIR) is
by DMA. Typically DMA can be used to transfer data of any length into the transmit FIFO
when requested by the infrared peripheral. When polling or interrupts are used to perform the
data transfer, a mechanism exists for transmitting data packets that are not a multiple of 4
bytes in length. This uses a register called IrDataTail and its use is described in the next
section.
The DMA route is usually provided to overcome any large interrupt response times that may
exist in the SoC where the Infrared module is going to be used. These large interrupt
response times can make programmed I/O an impractical method for transferring large Ir
data packets.
• MIR - Clear BRD bit in IrControl (IrCon) for 0.576 Mbit/sec,
• FIR - Fixed at 4 Mbit/sec.
Set BRD bit in IrCon for 1.152 Mbit/sec.
IrEnable
EN1
0
0
1
1
Table 17-1. Bit Values to Select Ir Module
Copyright 2007 Cirrus Logic
IrEnable
EN0
0
1
0
1
Encoder
Selected
None
MIR
SIR
FIR
EP93xx User’s Guide
IrDA
17-3
17
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