EP9307-CRZ Cirrus Logic Inc, EP9307-CRZ Datasheet - Page 709
EP9307-CRZ
Manufacturer Part Number
EP9307-CRZ
Description
IC ARM9 SOC ARM920T 272TFBGA
Manufacturer
Cirrus Logic Inc
Series
EP9r
Datasheets
1.EP9307-CRZ.pdf
(16 pages)
2.EP9307-CRZ.pdf
(50 pages)
3.EP9307-CRZ.pdf
(824 pages)
4.EP9307-CRZ.pdf
(48 pages)
Specifications of EP9307-CRZ
Core Size
16/32-Bit
Core Processor
ARM9
Speed
200MHz
Connectivity
EBI/EMI, Ethernet, I²C, IrDA, Keypad/Touchscreen, SPI, UART/USART, USB
Peripherals
AC'97, DMA, I²:S, LCD, LED, MaverickKey, POR, PWM, WDT
Number Of I /o
14
Program Memory Type
ROMless
Ram Size
32K x 8
Voltage - Supply (vcc/vdd)
1.65 V ~ 3.6 V
Data Converters
A/D 8x12b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
272-TFBGA
Controller Family/series
(ARM9)
No. Of I/o's
14
Ram Memory Size
32MB
Cpu Speed
200MHz
No. Of Timers
4
No. Of Pwm Channels
1
Digital Ic Case Style
TFBGA
Embedded Interface Type
AC97, I2S, SPI, UART, USB
Rohs Compliant
Yes
Processor Series
EP93xx
Core
ARM920T
Data Bus Width
32 bit
3rd Party Development Tools
MDK-ARM, RL-ARM, ULINK2
Development Tools By Supplier
EDB9307A-Z
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
For Use With
598-1133 - KIT DEVELOPMENT EP9307 ARM9
Eeprom Size
-
Program Memory Size
-
Lead Free Status / Rohs Status
Details
Other names
598-1138
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Part Number:
EP9307-CRZ
Manufacturer:
CIRRUS
Quantity:
20 000
Part Number:
EP9307-CRZ/E2
Manufacturer:
CIRRUS
Quantity:
20 000
Company:
Part Number:
EP9307-CRZR
Manufacturer:
Cirrus Logic Inc
Quantity:
10 000
- EP9307-CRZ PDF datasheet
- EP9307-CRZ PDF datasheet #2
- EP9307-CRZ PDF datasheet #3
- EP9307-CRZ PDF datasheet #4
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- Download datasheet (13Mb)
AC97GCR
DS785UM1
31
15
Definition:
Bit Descriptions:
Address:
Definition:
Bit Descriptions:
30
14
29
13
28
12
End Of Interrupt Register. The AC’97 End Of Interrupt Register is a write-only
register that allows the CODECREADY and WIS interrupts to be cleared. A
write to this location clears the interrupt.
RSVD:
CODECREADY:
WINT:
0x8088_009C - Read/Write
Global Control Register. The AC97GCR register is the main control register for
the AC’97 Controller. All bits are cleared on reset.
The AC97IFE creates the clock enable signal for the clock controller block. It
is used to enable/disable both PCLK and AC97LK.
RSVD:
OCODECReady: If set to “1”, this bit will override normal CODEC-ready
LOOP:
AC97IFE:
27
11
26
10
RSVD
Copyright 2007 Cirrus Logic
25
9
Reserved. Unknown During Read.
CODECREADY Interrupt Status Clear. A write of “1” to this
location will clear the CODECREADY interrupt bit.
Wake-up Interrupt Status Clear. A write of “1” to this
location will clear the WIS interrupt bit.
Reserved. Unknown During Read.
Loopback mode: If this is set to “1”, loopback test mode is
AC97IF Enable: If this bit is set the AC’97 is enabled.
24
8
definition.
enabled. Defaults to “0” when reset. Ensure this bit
is always “0” for normal operation.
Defaults to “0” on reset. When set to “0”, all FIFOs
are reset to “0”.
RSVD
23
7
22
6
21
5
20
4
19
3
OCODECReady
EP93xx User’s Guide
18
2
AC’97 Controller
LOOP
17
1
AC97IFE
22-21
16
0
22
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