PXAS37KBA,512 NXP Semiconductors, PXAS37KBA,512 Datasheet - Page 15

IC XA MCU 16BIT 32K OTP 68-PLCC

PXAS37KBA,512

Manufacturer Part Number
PXAS37KBA,512
Description
IC XA MCU 16BIT 32K OTP 68-PLCC
Manufacturer
NXP Semiconductors
Series
XAr
Datasheet

Specifications of PXAS37KBA,512

Core Processor
XA
Core Size
16-Bit
Speed
30MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Processor Series
PXAS3x
Core
80C51
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
I2C, UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
50
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-3536-5
935262377512
PXAS37KBA

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Manufacturer
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1. These settings provide additional A/D input sampling time, in order to allow accurate readings with a higher external source impedance.
Philips Semiconductors
Table 2. A/D Timing Configuration
NOTE:
2000 Dec 01
0h (0000)
1h (0001)
2h (0010)
3h (0011)
4h (0100)
5h (0101)
6h (0110)
7h (0111)
8h (1000)
9h (1001)
Ah (1010)
Bh (1011)
Ch (1100)
Dh (1101)
Eh (1110)
Fh (1111)
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
ADCS
Bit Addressable
Reset Value: 00h
ADCFG
Not bit Addressable
Reset Value: 00h
2
C, 2 UARTs, 16 MB address range
ADCFG 3 0
ADCFG.3–0
BIT
ADCS.7
ADCS.6
ADCS.5
ADCS.4
ADCS.3
ADCS.2
ADCS.1
ADCS.0
BIT
ADCFG.7
ADCFG.6
ADCFG.5
ADCFG.4
ADCFG.3–0
1
1
Address:43Fh
Address:4B9h
SYMBOL
ADCS7
ADCS6
ADCS5
ADCS4
ADCS3
ADCS2
ADCS1
ADCS0
SYMBOL
ADCFG
Frequency (MHz)
Max. Oscillator
13.33
16.66
11.11
6.66
22.2
23.3
26.6
10
20
20
30
30
FUNCTION
A/D channel 7 select bit.
A/D channel 6 select bit.
A/D channel 5 select bit.
A/D channel 4 select bit.
A/D channel 3 select bit.
A/D channel 2 select bit.
A/D channel 1 select bit.
A/D channel 0 select bit.
FUNCTION
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
Reserved for future use. Should not be set to 1 by user programs.
A/D timing configuration (see text and table).
MSB
MSB
ADCS7
Figure 3. A/D Timing Configuration Register (ADCFG)
Figure 2. A/D Channel Select Register (ADCS)
ADCS6
Osc. Clocks
ADCS5
100
104
116
108
124
128
132
146
136
152
172
176
72
76
80
96
15
ADCS4
Conversion Time
ADCS3
A/D Timing Configuration
sec at max. Osc.
ADCS2
10.81
4.86
5.32
4.81
4.87
4.25
4.56
7.6
7.2
7.2
6.0
5.2
5.8
4.4
4.7
4.4
ADCS1
ADCS0
SU00940
SU00939
LSB
LSB
Preliminary specification
Sampling Time
(Osc. Clocks)
p
10
12
24
14
14
16
18
32
20
20
22
24
4
6
8
8
g
XA-S3