PXAS37KBA,512 NXP Semiconductors, PXAS37KBA,512 Datasheet - Page 39

IC XA MCU 16BIT 32K OTP 68-PLCC

PXAS37KBA,512

Manufacturer Part Number
PXAS37KBA,512
Description
IC XA MCU 16BIT 32K OTP 68-PLCC
Manufacturer
NXP Semiconductors
Series
XAr
Datasheet

Specifications of PXAS37KBA,512

Core Processor
XA
Core Size
16-Bit
Speed
30MHz
Connectivity
EBI/EMI, I²C, UART/USART
Peripherals
PWM, WDT
Number Of I /o
50
Program Memory Size
32KB (32K x 8)
Program Memory Type
OTP
Ram Size
1K x 8
Voltage - Supply (vcc/vdd)
2.7 V ~ 5.5 V
Data Converters
A/D 8x8b
Oscillator Type
External
Operating Temperature
0°C ~ 70°C
Package / Case
68-PLCC
Processor Series
PXAS3x
Core
80C51
Data Bus Width
16 bit
Data Ram Size
1 KB
Interface Type
I2C, UART
Maximum Clock Frequency
30 MHz
Number Of Programmable I/os
50
Number Of Timers
3
Operating Supply Voltage
2.7 V to 5.5 V
Maximum Operating Temperature
+ 70 C
Mounting Style
SMD/SMT
Minimum Operating Temperature
0 C
On-chip Adc
8 bit, 8 Channel
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
 Details
Other names
568-3536-5
935262377512
PXAS37KBA

Available stocks

Company
Part Number
Manufacturer
Quantity
Price
Part Number:
PXAS37KBA,512
Manufacturer:
TI
Quantity:
5
Part Number:
PXAS37KBA,512
Manufacturer:
NXP Semiconductors
Quantity:
10 000
Part Number:
PXAS37KBA,512
Manufacturer:
NXP USA Inc.
Quantity:
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Philips Semiconductors
AC ELECTRICAL CHARACTERISTICS (5 V RANGE) (continued)
This set of parameters is referenced to the XA-S3 clock output.
NOTES ON PAGE 41.
2000 Dec 01
Address Cycle
Code Read Cycle
Data Read Cycle
Data Write Cycle
Wait Input
SYMBOL
SYMBOL
XA 16-bit microcontroller
32 K/1 K OTP/ROM/ROMless, 8-channel 8-bit A/D, low voltage (2.7 V–5.5 V),
I
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
t
CHLH
CLLL
CHAV
CHAX
CHPL
CHPH
IVCH
CHIX
CHIZ
CHRL
CHRH
DVCH
CHDX
CHDZ
CHWL
CHWH
QVCH
CHQX
CHWTH
2
C, 2 UARTs, 16 MB address range
FIGURE
FIGURE
26
26
26
26
26
26
26
26
26
28
28
28
28
28
30
30
30
30
31
CLKOUT rising edge to ALE rising edge
CLKOUT falling edge to ALE falling edge
CLKOUT rising edge to address valid
CLKOUT rising edge to address changing (hold time)
CLKOUT rising edge to PSEN asserted
CLKOUT rising edge to PSEN de-asserted
Instruction valid to CLKOUT rising edge (setup time)
CLKOUT rising edge to instruction changing (hold time)
CLKOUT rising edge to Bus 3-State (code read)
CLKOUT rising edge to RD asserted
CLKOUT rising edge to RD de-asserted
Data valid to CLKOUT rising edge (setup time)
CLKOUT rising edge to Data changing (hold time)
CLKOUT rising edge to Bus 3-State (data read)
CLKOUT falling edge to WR asserted
CLKOUT rising edge to WR de-asserted
Data valid to CLKOUT rising edge (setup time)
CLKOUT rising edge to Data changing (hold time)
WAIT valid prior to CLKOUT rising edge
PARAMETER
PARAMETER
8
39
MIN
20
20
21
2
0
0
4
0
LIMITS
MAX
t
t
C
C
13
18
14
12
12
10
12
10
Preliminary specification
9
4
–8
–8
XA-S3
UNIT
UNIT
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns
ns