ST62T03CM6 STMicroelectronics, ST62T03CM6 Datasheet - Page 75

• Manufacturer Part Number: ST62T03CM6
• Description: IC MCU 8BIT W/ADC 16-SOP
• Manufacturer: STMicroelectronics
• Series: ST6r

Specifications of ST62T03CM6

• Core Processor: ST6
• Core Size: 8-Bit
• Speed: 8MHz
• Peripherals: LVD, POR, WDT
• Number Of I /o: 9
• Program Memory Size: 1KB (1K x 8)
• Program Memory Type: OTP
• Ram Size: 64 x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 85°C
• Package / Case: 16-SOIC (0.300", 7.5mm Width)
• Controller Family/series: ST6
• No. Of I/o's: 9
• Ram Memory Size: 64Byte
• Cpu Speed: 8MHz
• No. Of Timers: 2
• Rohs Compliant: Yes
• Processor Series: ST62T0x
• Core: ST6
• Data Bus Width: 8 bit
• Data Ram Size: 64 B
• Maximum Clock Frequency: 8 MHz
• Number Of Programmable I/os: 9
• Number Of Timers: 2
• Operating Supply Voltage: 3 V to 6 V
• Maximum Operating Temperature: + 85 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
• Minimum Operating Temperature: - 40 C
• On-chip Adc: 8 bit
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Connectivity: -
• Lead Free Status / Rohs Status: In Transition
• Other names: 497-8233; ST62T03CM6

EMC CHARACTERISTICS (Cont’d)
10.7.2.2 Static and Dynamic Latch-Up
■
Electrical Sensitivities
Notes:
1. Class description: A Class is an STMicroelectronics internal specification. All its limits are higher than the JEDEC spec-
2. Schaffner NSG435 with a pointed test finger.
Figure 52. Simplified Diagram of the ESD Generator for DLU
ifications, that means when a device belongs to Class A it exceeds the JEDEC standard. B Class strictly covers all the
JEDEC criteria (international standard).
LU: 3 complementary static tests are required
on 10 parts to assess the latch-up performance.
A supply overvoltage (applied to each power
supply pin), a current injection (applied to each
input, output and configurable I/O pin) and a
power supply switch sequence are performed
on each sample. This test conforms to the EIA/
JESD 78 IC latch-up standard. For more details,
refer to the AN1181 application note.
Symbol
DLU
LU
ESD
GENERATOR
Static latch-up class
Dynamic latch-up class
R
2)
CH
Parameter
C
=50M
S
150pF
R
D
=330
Doc ID 4563 Rev 5
HV RELAY
DISCHARGE
RETURN CONNECTION
T
T
V
A
A
DD
+25°C
+85°C
■
5V, f
DISCHARGE TIP
DLU: Electro-Static Discharges (one positive
then one negative test) are applied to each pin
of 3 samples when the micro is running to
assess the latch-up performance in dynamic
mode. Power supplies are set to the typical
values, the oscillator is connected as near as
possible to the pins of the micro and the
component is put in reset mode. This test
conforms to the IEC1000-4-2 and SAEJ1752/3
standards and is described in
more details, refer to the AN1181 application
note.
OSC
Conditions
4MHz, T
ST6200C ST6201C ST6203C
A
ST6
+25°C
V
V
DD
SS
Class
Figure
A
A
A
1)
52. For
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