ST72F324LJ2T5 STMicroelectronics, ST72F324LJ2T5 Datasheet - Page 141
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ST72F324LJ2T5
Manufacturer Part Number
ST72F324LJ2T5
Description
IC MCU 8BIT 8K FLASH 44-LQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F324LJ2T5.pdf
(154 pages)
Specifications of ST72F324LJ2T5
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
SCI, SPI
Peripherals
POR, PWM, WDT
Number Of I /o
32
Program Memory Size
8KB (8K x 8)
Program Memory Type
FLASH
Ram Size
384 x 8
Voltage - Supply (vcc/vdd)
2.85 V ~ 3.6 V
Data Converters
A/D 12x10b
Oscillator Type
Internal
Operating Temperature
-10°C ~ 85°C
Package / Case
44-LQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
384 B
Interface Type
SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
32
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7MDT20-DVP3, ST7MDT20J-EMU3, STX-RLINK
Minimum Operating Temperature
- 10 C
On-chip Adc
10 bit, 12 Channel
For Use With
497-6421 - BOARD EVAL DGTL BATT CHGR DESIGN497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-8242
ST72F324LJ2T5
ST72F324LJ2T5
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
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ST72F324LJ2T5
Manufacturer:
STMicroelectronics
Quantity:
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ST72F324LJ2T5
Manufacturer:
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Part Number:
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DEVICE CONFIGURATION AND ORDERING INFORMATION (Cont’d)
OPTION BYTE 1
OPT7= PKG1 Pin package selection bit
This option bit selects the package.
Note: On the chip, each I/O port has 8 pads. Pads
that are not bonded to external pins are in input
pull-up configuration after reset. The configuration
of these pads must be kept at reset state to avoid
added current consumption.
OPT6 = RSTC RESET clock cycle selection
This option bit selects the number of CPU cycles
applied during the RESET phase and when exiting
HALT mode. For resonator oscillators, it is advised
to select 4096 due to the long crystal stabilization
time.
0: Reset phase with 4096 CPU cycles
1: Reset phase with 256 CPU cycles
OPT5:4 = OSCTYPE[1:0] Oscillator Type
These option bits select the ST7 main clock
source type.
CAUTION: In Flash devices, External Clock
Source is not supported if the PLL is enabled.
OPT3:1 = OSCRANGE[2:0] Oscillator range
When the resonator oscillator type is selected,
Resonator Oscillator
Reserved
Internal RC Oscillator
External Source
Version
S/J
K
Clock Source
Selected Package
LQFP32 / SDIP32
LQFP48/LQFP44
1
0
0
1
1
OSCTYPE
PKG1
0
0
1
0
1
1
0
these option bits select the resonator oscillator
current source corresponding to the frequency
range of the used resonator. Otherwise, these bits
are used to select the normal operating frequency
range.
OPT0 = PLL OFF PLL activation
This option bit activates the PLL which allows mul-
tiplication by two of the main input clock frequency.
The PLL is guaranteed only with an input frequen-
cy between 2 and 4MHz.
0: PLL x2 enabled
1: PLL x2 disabled
Caution: the PLL can be enabled only if the “OSC
RANGE” (OPT3:1) bits are configured to “MP -
2~4MHz”. Otherwise, the device functionality is
not guaranteed.
Caution: The PLL must not be used with the inter-
nal RC oscillator.
LP
MP
MS
HS
Typ. Freq. Range
8~16MHz
1~2MHz
2~4MHz
4~8MHz
2
0
0
0
0
OSCRANGE
ST72324Lxx
1
0
0
1
1
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0
0
1
0
1
1