ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 48

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5
ST6208C/ST6209C/ST6210C/ST6220C
8-BIT TIMER (Cont’d)
8.2.4 Functional Description
There are three operating modes, which are se-
lected by the TOUT and DOUT bits (see TSCR
register). These three modes correspond to the
two clocks which can be connected to the 7-bit
prescaler (f
the output mode.
The settings for the different operating modes are
summarized
Table 13. Timer Operating Modes
8.2.4.1 Gated Mode
(TOUT = “0”, DOUT = “1”)
In this mode, the prescaler is decremented by the
Timer clock input, but only when the signal on the
TIMER pin is held high (f
pin). See
This mode is selected by clearing the TOUT bit in
the TSCR register (i.e. as input) and setting the
DOUT bit.
Note: In this mode, if the TIMER pin is multi-
plexed, the corresponding port control bits have to
be set in input with pull-up configuration through
48/104
1
TOUT DOUT
0
0
1
1
0
1
0
1
Figure 28
INT
Table
Event Counter
Gated input
÷ 12 or TIMER pin signal), and to
Function
Output “0”
Output “1”
(output)
(output)
Timer
(input)
(input)
13.
and
Figure
INT
/12 gated by TIMER
External counter clock
External Pulse length
29.
measurement
Output signal
Application
generation
source
the DDR, OR and DR registers. For more details,
please refer to the I/O Ports section.
Figure 28. f
Figure 29. Gated Mode Operation
COUNTER VALUE
TIMER CLOCK
xx2
xx1
TIMER PIN
TIMER
1
VALUE 1
TIMER
f
INT
f
EXT
/12
Clock in Gated Mode
PULSE LENGTH
f
PRESCALER
VALUE 2

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