ST62T20CB6 STMicroelectronics, ST62T20CB6 Datasheet - Page 53

IC MCU 8BIT OTP 4K 20 PDIP

ST62T20CB6

Manufacturer Part Number
ST62T20CB6
Description
IC MCU 8BIT OTP 4K 20 PDIP
Manufacturer
STMicroelectronics
Series
ST6r
Datasheet

Specifications of ST62T20CB6

Core Processor
ST6
Core Size
8-Bit
Speed
8MHz
Peripherals
LVD, POR, WDT
Number Of I /o
12
Program Memory Size
4KB (4K x 8)
Program Memory Type
OTP
Ram Size
64 x 8
Voltage - Supply (vcc/vdd)
3 V ~ 6 V
Data Converters
A/D 8x8b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
20-DIP (0.300", 7.62mm)
Controller Family/series
ST6
No. Of I/o's
12
Ram Memory Size
64Byte
Cpu Speed
8MHz
No. Of Timers
1
Rohs Compliant
Yes
Processor Series
ST62T2x
Core
ST6
Data Bus Width
8 bit
Data Ram Size
64 B
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
12
Number Of Timers
2
Operating Supply Voltage
3 V to 6 V
Maximum Operating Temperature
+ 85 C
Mounting Style
Through Hole
Development Tools By Supplier
ST622XC-KIT/110, ST62GP-EMU2, ST62E2XC-EPB/110, ST62E6XC-EPB/US, STREALIZER-II
Minimum Operating Temperature
- 40 C
On-chip Adc
8 bit
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Connectivity
-
Lead Free Status / Rohs Status
In Transition
Other names
497-2098-5
A/D CONVERTER (Cont’d)
8.3.3 Functional Description
8.3.3.1 Analog Power Supply
The high and low level reference voltage pins are
internally connected to the V
Conversion accuracy may therefore be impacted
by voltage drops and noise in the event of heavily
loaded or badly decoupled power supply lines.
8.3.3.2 Digital A/D Conversion Result
The conversion is monotonic, meaning that the re-
sult never decreases if the analog input does not
and never increases if the analog input does not.
If the input voltage (V
to V
conversion result in the DR register is FFh (full
scale) without overflow indication.
If input voltage (V
V
version result in the DR register is 00h.
The A/D converter is linear and the digital result of
the conversion is stored in the ADR register. The
accuracy of the conversion is described in the par-
ametric section.
R
for an analog input signal. If the impedance is too
high, this will result in a loss of accuracy due to
leakage and sampling not being completed in the
allocated time. Refer to the electrical characteris-
tics chapter for more details.
With an oscillator clock frequency less than
1.2MHz, conversion accuracy is decreased.
8.3.3.3 Analog Input Selection
Selection of the input pin is done by configuring
the related I/O line as an analog input via the Data
Direction, Option and Data registers (refer to I/O
ports description for additional information).
Caution: Only one I/O line must be configured as
an analog input at any time. The user must avoid
any situation in which more than one I/O pin is se-
lected as an analog input simultaneously, because
they will be shorted internally.
SSA
AIN
DDA
is the maximum recommended impedance
(low-level voltage reference) then the con-
(high-level voltage reference) then the
AIN
AIN
) is lower than or equal to
) is greater than or equal
DD
and V
SS
pins.
8.3.3.4 Software Procedure
Refer to the Control register (ADCR) and Data reg-
ister (ADR) in
Analog Input Configuration
The analog input must be configured through the
Port Control registers (DDRx, ORx and DRx). Re-
fer to the I/O port chapter.
ADC Configuration
In the ADCR register:
– Reset the PDS bit to power on the ADC. This bit
– Set the EAI bit to enable the ADC interrupt if
ADC Conversion
In the ADCR register:
– Set the STA bit to start a conversion. This auto-
When a conversion is complete
– The EOC bit is set by hardware to flag that con-
– An interrupt is generated if the EAI bit was set
Setting the STA bit will start a new count and will
clear the EOC bit (thus clearing the interrupt con-
dition)
Note:
Setting the STA bit must be done by a different in-
struction from the instruction that powers-on the
ADC (setting the PDS bit) in order to make sure
the voltage to be converted is present on the pin.
Each conversion has to be separately initiated by
writing to the STA bit.
The STA bit is continuously scanned so that, if the
user sets it to “1” while a previous conversion is in
progress, a new conversion is started before com-
pleting the previous one. The start bit (STA) is a
write only bit, any attempt to read it will show a log-
ical “0”.
must be set at least one instruction before the
beginning of the conversion to allow stabilisation
of the A/D converter.
needed.
matically clears (resets to “0”) the End Of Con-
version Bit (EOC).
version is complete and that the data in the ADC
data conversion register is valid.
ST6208C/ST6209C/ST6210C/ST6220C
Section 8.3.7
for the bit definitions.
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