ST72F325AR9T6 STMicroelectronics, ST72F325AR9T6 Datasheet - Page 49
![MCU 8BIT 60KB FLASH/ROM 64-TQFP](/photos/6/76/67655/497-64-tqfp_sml.jpg)
ST72F325AR9T6
Manufacturer Part Number
ST72F325AR9T6
Description
MCU 8BIT 60KB FLASH/ROM 64-TQFP
Manufacturer
STMicroelectronics
Series
ST7r
Datasheet
1.ST72F325K6T6.pdf
(197 pages)
Specifications of ST72F325AR9T6
Core Processor
ST7
Core Size
8-Bit
Speed
8MHz
Connectivity
I²C, SCI, SPI
Peripherals
LVD, POR, PWM, WDT
Number Of I /o
48
Program Memory Size
60KB (60K x 8)
Program Memory Type
FLASH
Ram Size
2K x 8
Voltage - Supply (vcc/vdd)
3.8 V ~ 5.5 V
Data Converters
A/D 16x10b
Oscillator Type
Internal
Operating Temperature
-40°C ~ 85°C
Package / Case
64-TQFP, 64-VQFP
Processor Series
ST72F3x
Core
ST7
Data Bus Width
8 bit
Data Ram Size
2 KB
Interface Type
I2C, SCI, SPI
Maximum Clock Frequency
8 MHz
Number Of Programmable I/os
48
Number Of Timers
2
Maximum Operating Temperature
+ 85 C
Mounting Style
SMD/SMT
Development Tools By Supplier
ST7232X-EVAL, ST7232X-SK/RAIS, ST72325-D/RAIS, ST7MDT20-DVP3, ST7MDT20J-EMU3, ST7MDT20M-EMU3, STX-RLINK
Minimum Operating Temperature
- 40 C
On-chip Adc
10 bit, 16 Channel
A/d Bit Size
10 bit
A/d Channels Available
16
Height
1.4 mm
Length
10 mm
Supply Voltage (max)
5.5 V
Supply Voltage (min)
3.8 V, 4.5 V
Width
10 mm
For Use With
497-5046 - KIT TOOL FOR ST7/UPSD/STR7 MCU
Lead Free Status / RoHS Status
Lead free / RoHS Compliant
Eeprom Size
-
Lead Free Status / Rohs Status
Details
Other names
497-5600
Available stocks
Company
Part Number
Manufacturer
Quantity
Price
Company:
Part Number:
ST72F325AR9T6
Manufacturer:
STMicroelectronics
Quantity:
10 000
POWER SAVING MODES (Cont’d)
8.4.2.1 Halt Mode Recommendations
– Make sure that an external event is available to
– When using an external interrupt to wake up the
– For the same reason, reinitialize the level sensi-
– The opcode for the HALT instruction is 0x8E. To
wake up the microcontroller from Halt mode.
microcontroller, reinitialize the corresponding I/O
as “Input Pull-up with Interrupt” before executing
the HALT instruction. The main reason for this is
that the I/O may be wrongly configured due to ex-
ternal interference or by an unforeseen logical
condition.
tiveness of each external interrupt as a precau-
tionary measure.
avoid an unexpected HALT instruction due to a
program counter failure, it is advised to clear all
occurrences of the data value 0x8E from memo-
– As the HALT instruction clears the interrupt mask
Related Documentation
AN 980: ST7 Keypad Decoding Techniques, Im-
plementing Wake-Up on Keystroke
AN1014: How to Minimize the ST7 Power Con-
sumption
AN1605: Using an active RC to wakeup the
ST7LITE0 from power saving mode
ry. For example, avoid defining a constant in
ROM with the value 0x8E.
in the CC register to allow interrupts, the user
may choose to clear all pending interrupt bits be-
fore executing the HALT instruction. This avoids
entering other peripheral interrupt routines after
executing the external interrupt routine corre-
sponding to the wake-up event (reset or external
interrupt).
ST72325xx
49/197