EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 173

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
ZDA
ZCL
ZDI Write Operations
ZDI Address
lsb of
can be repeated. Repeated Read or Write operations can occur without requiring a resend
of the ZDI command. To initiate a new ZDI command, a START signal must follow.
Figure 41
ZDI Single-Byte Write
For single-byte Write operations, the address and Write control bit are first written to the
ZDI block. Following the single-bit byte separator, the data is shifted into the ZDI block
on the next eight rising edges of ZCL. The master terminates activity after 8 clock
cycles.Figure 42
A0
ZDA
ZCL
7
Write
START
8
Signal
Byte Separator
S
displays the timing for address Writes to ZDI registers.
Single-Bit
Figure 42.ZDI Single-Byte Data Write Timing
0/1
9
displays the timing for ZDI single-byte Write operations.
msb
A6
of DATA
1
msb
D7
1
A5
Figure 41.ZDI Address Write Timing
2
D6
2
A4
3
D5
3
ZDI Address Byte
A3
ZDI Data Byte
D4
4
4
A2
D3
5
5
D2
A1
6
6
D1
A0
7
lsb
7
Product Specification
0 = WRITE
1 = READ
of DATA
eZ80F92/eZ80F93
D0
R/W
lsb
8
Zilog Debug Interface
8
Byte Separator
START Signal
START Signal
End of Data
or New ZDI
or new ZDI
Single-Bit
0/1
1
9
9
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