EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 203

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
therefore takes at most 10.8 ms. This measure of time does not include the time required
by the CPU to transfer data to the registers, which is a function of the instructions
employed and the system clock frequency.
A sequence that performs a single-byte I/O Write is detailed below. As the Write is self-
timed, the following sequence can be repeated back-to-back without any necessity for
polling or interrupts:
1. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
2. Write the data value to the FLASH_DATA register.
Multibyte I/O Write (Row Programming)
Multibyte I/O Write operations use the same I/O registers as single-byte Writes, but use an
internal address incrementer for subsequent Writes. Multibyte Writes allow programming
of a full row and are enabled by setting the ROW_PGM bit of the Flash Program Control
Register. For multibyte Writes, the CPU sets the address registers, enables row
programming, and then executes a output to I/O instruction with repeat to load the block
of data into the FLASH_DATA register. For each individual byte written to the
FLASH_DATA register during the block move, the Flash controller asserts the internal
WAIT signal to stall the CPU until the current byte has been programmed.
During row programming, the Flash controller continuously asserts Flash’s high voltage
until all bytes are programmed (column address < 127). As a consequence, the row can be
programmed faster than if the high voltage is toggled for each byte. The per-byte
programming time during row programming is between 41 µs and 52 µs. As such,
programming the 128 bytes of a row in this mode takes at most 6.7 ms, leaving 9.3 ms for
the overhead of CPU instructions used to fetch the 128 bytes.
A sequence that performs a multibyte I/O Write is shown in the following sequence:
1. Check the FLASH_IRQ register to be sure any previous Row Program has completed.
2. Write the FLASH_PAGE, FLASH_ROW, and FLASH_COL registers with the
3. Set the ROW_PGM bit in the FLASH_PGCTL register to enable row programming
4. Write the next data value to the FLASH_DATA register.
5. If the end of the row has not been reached, return to
During row programming, software must monitor the row time-out error bit either by
enabling this interrupt or through polling. If a row time-out occurs, the Flash controller
aborts the row programming operation and software must then assure that no further
writes are performed to the row without it first being erased. It is suggested that row
programming only be used one time per row and not in combination with single-byte
address of the byte to be written.
address of the first byte to be written.
mode.
Step
4.
Product Specification
eZ80F92/eZ80F93
Flash Memory
196