EZ80F92AZ020EG Zilog, EZ80F92AZ020EG Datasheet - Page 204

• Manufacturer Part Number: EZ80F92AZ020EG
• Description: IC ACCLAIM MCU 128KB 100LQFP
• Manufacturer: Zilog
• Series: eZ80® Acclaim!®r

Specifications of EZ80F92AZ020EG

• Core Processor: Z8
• Core Size: 8-Bit
• Speed: 20MHz
• Connectivity: I²C, IrDA, SPI, UART/USART
• Peripherals: Brown-out Detect/Reset, POR, WDT
• Number Of I /o: 24
• Program Memory Size: 128KB (128K x 8)
• Program Memory Type: FLASH
• Ram Size: 8K x 8
• Voltage - Supply (vcc/vdd): 3 V ~ 3.6 V
• Oscillator Type: Internal
• Operating Temperature: -40°C ~ 105°C
• Package / Case: 100-LQFP
• Processor Series: EZ80F92x
• Core: eZ80
• Data Bus Width: 8 bit
• Data Ram Size: 8 KB
• Interface Type: I2C, IrDA, SPI, UART
• Maximum Clock Frequency: 20 MHz
• Number Of Programmable I/os: 24
• Number Of Timers: 6
• Operating Supply Voltage: 3 V to 3.6 V
• Maximum Operating Temperature: + 105 C
• Mounting Style: SMD/SMT
• Development Tools By Supplier: eZ80F920200ZCOG
• Minimum Operating Temperature: - 40 C
• Lead Free Status / RoHS Status: Lead free / RoHS Compliant
• Eeprom Size: -
• Data Converters: -
• Lead Free Status / Rohs Status: Details
• Other names: 269-3871; EZ80F92AZ020EG

PS015313-0508
Erasing Flash Memory
Flash Control Registers
Writes to the same row without first erasing it. Otherwise, the burden is on software to
ensure that the 16 ms maximum cumulative programming time between erasures is not
exceeded for a row.
Memory Write
A single-byte memory Write operation uses the address bus and data bus of the eZ80F92
device for programming a single data byte to Flash. While the CPU executes a LOAD
instruction, the Flash controller asserts the internal WAIT signal to stall the CPU until the
Write is complete. A single-byte Write takes between 66 µs and 85 µs to complete.
Programming an entire row using memory Writes therefore takes at most 10.8 ms. This
time does not include time required by the CPU to transfer data to the registers which is a
function of the instructions employed and the system clock frequency.
The memory Write function does not support multibyte row programming. As memory
Writes are self-timed, they can be performed back-to-back without any necessity for
polling or interrupts.
Erasing bytes in Flash memory returns them to a value of FFh. Both the Mass and Page
Erase operations are self-timed by the Flash controller, leaving the CPU free to execute
other operations in parallel. The DONE status bit in the Flash Interrupt Control Register
can be polled by software or used as an interrupt source to signal completion of an Erase
operation. If the CPU attempts to access Flash while an Erase is in progress, the Flash
controller forces a WAIT state until the Erase operation completes.
Mass Erase
Performing a Mass Erase operation on Flash memory erases all bits in Flash, including the
Information Page. This self-timed operation takes approximately 200 ms to complete.
Page Erase
The smallest erasable unit in Flash memory is a page. Which of the main Flash memory
pages or the single Information Page is to be erased is determined by the setting of the
FLASH_PAGE register. This self-timed operation takes approximately 10 ms to complete.
The Flash register interface contains all the registers used in Flash memory.
The definitions as follows describe each register.
Product Specification
eZ80F92/eZ80F93
Flash Memory
197